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flashchips: add GD25F64F

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GD25F64F: 3V 64Mbit, high performance

Tested on ch347 with erase, write, read, and protection

Change-Id: I07005f1589b76c8a61a1a744b16dc6b0c9020e11
Signed-off-by: Victor Lim <vlim@gigadevice.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/84705
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Victor Lim 2024-10-08 02:03:42 -07:00 committed by Anastasia Klimchuk
parent 348dbeb05f
commit 521c85cc7b
2 changed files with 50 additions and 0 deletions
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49
flashchips.c
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@ -8139,6 +8139,55 @@ const struct flashchip flashchips[] = {
.voltage = {2300, 3600}, .voltage = {2300, 3600},
}, },
{
.vendor = "GigaDevice",
.name = "GD25F64F",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
.model_id = GIGADEVICE_GD25F64F,
.total_size = 8192,
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 2048} },
.block_erase = SPI_BLOCK_ERASE_20,
}, {
.eraseblocks = { {32 * 1024, 256} },
.block_erase = SPI_BLOCK_ERASE_52,
}, {
.eraseblocks = { {64 * 1024, 128} },
.block_erase = SPI_BLOCK_ERASE_D8,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_60,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = SPI_BLOCK_ERASE_C7,
}
},
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.srl = {STATUS2, 0, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
.tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
.sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
.cmp = {STATUS3, 4, RW},
},
.decode_range = DECODE_RANGE_SPI25,
},
{ {
.vendor = "GigaDevice", .vendor = "GigaDevice",
.name = "GD25WQ80E", .name = "GD25WQ80E",

1
include/flashchips.h
View File

@ -401,6 +401,7 @@
#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
#define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ80C 0x4214
#define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25VQ16C 0x4215
#define GIGADEVICE_GD25F64F 0x4317
#define GIGADEVICE_GD25LQ40 0x6013 #define GIGADEVICE_GD25LQ40 0x6013
#define GIGADEVICE_GD25LQ80 0x6014 #define GIGADEVICE_GD25LQ80 0x6014
#define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ16 0x6015