From 5234c57e33eedb1fd3329389f77b9696e009de25 Mon Sep 17 00:00:00 2001 From: Vasily Galkin Date: Sun, 27 Aug 2023 01:46:20 +0300 Subject: [PATCH] flashchips: add WP features for W25X* analogous to tested W25X20 These chips were not tested physically, just added since they are very similar to just added and tested W25X20. However basic logic test were done via running --wp-list with dummy emulating those IDs While there are per-chip datasheets like https://www.winbond.com/resource-files/W25X05CL_G%2008012019.pdf the combined datasheets that shows differences between WP modes of different chips are more useful: https://www.winbond.com/resource-files/w25x10a-20a-40a-80a%20revf%20080709.pdf https://media.digikey.com/pdf/data%20sheets/winbond%20pdfs/w25x16,16a,32,64.pdf Signed-off-by: Vasily Galkin Change-Id: Ie69660a6f69e3cac31c5565792f401e69d43f8b8 Reviewed-on: https://review.coreboot.org/c/flashrom/+/77531 Tested-by: build bot (Jenkins) Reviewed-by: Nikolai Artemiev --- flashchips.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/flashchips.c b/flashchips.c index 26decb1ed..db4bea653 100644 --- a/flashchips.c +++ b/flashchips.c @@ -19722,6 +19722,14 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2300, 3600}, + .reg_bits = + { + /* W25X05 is single 64KiB block without any smaller WP granularity */ + /* According to datasheet W25X05 has 2 BP bits, any non-zero value protects ALL.*/ + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19754,6 +19762,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19792,6 +19807,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19869,6 +19891,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19901,6 +19930,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19939,6 +19975,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { @@ -19971,6 +20014,13 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, /* W29EE011, W29EE012, W29C010M, W29C011A do not support probe_jedec according to the datasheet, but it works for newer(?) steppings. */