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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

This is the bitbanging SPI driver infrastructure

If you want support for a particular piece of hardware, just fill in
a few functions in spi_bitbang_master_table. That's it.
On top of this, the RayeR SPI flasher should be supportable in ~20 LOC.

Tested, trace looks OK.

Corresponding to flashrom svn r736.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
2009-09-28 13:15:16 +00:00
parent 07c54c83f8
commit 547872b4ea
4 changed files with 198 additions and 0 deletions

23
flash.h
View File

@ -145,6 +145,21 @@ uint32_t chip_readl(const chipaddr addr);
void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
void programmer_delay(int usecs);
enum spi_bitbang_master {
SPI_BITBANG_INVALID /* This must always be the last entry. */
};
extern const int spi_bitbang_master_count;
extern enum spi_bitbang_master spi_bitbang_master;
struct spi_bitbang_master_entry {
void (*set_cs) (int val);
void (*set_sck) (int val);
void (*set_mosi) (int val);
int (*get_miso) (void);
};
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
enum chipbustype {
@ -444,6 +459,14 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const u
int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
/* bitbang_spi.c */
extern int bitbang_half_period;
extern const struct spi_bitbang_master_entry spi_bitbang_master_table[];
int bitbang_spi_init(void);
int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
/* flashrom.c */
extern char *programmer_param;
extern int verbose;