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https://review.coreboot.org/flashrom.git
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This is the bitbanging SPI driver infrastructure
If you want support for a particular piece of hardware, just fill in a few functions in spi_bitbang_master_table. That's it. On top of this, the RayeR SPI flasher should be supportable in ~20 LOC. Tested, trace looks OK. Corresponding to flashrom svn r736. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
parent
07c54c83f8
commit
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8
Makefile
8
Makefile
@ -68,6 +68,9 @@ SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"'
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# Always enable serprog for now. Needs to be disabled on Windows.
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# Always enable serprog for now. Needs to be disabled on Windows.
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CONFIG_SERPROG ?= yes
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CONFIG_SERPROG ?= yes
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# Bitbanging SPI infrastructure is not used yet.
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CONFIG_BITBANG_SPI ?= no
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# Always enable 3Com NICs for now.
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# Always enable 3Com NICs for now.
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CONFIG_NIC3COM ?= yes
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CONFIG_NIC3COM ?= yes
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@ -94,6 +97,11 @@ LIBS += -lsocket
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endif
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endif
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endif
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endif
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ifeq ($(CONFIG_BITBANG_SPI), yes)
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FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1'
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OBJS += bitbang_spi.o
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endif
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ifeq ($(CONFIG_NIC3COM), yes)
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ifeq ($(CONFIG_NIC3COM), yes)
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FEATURE_CFLAGS += -D'NIC3COM_SUPPORT=1'
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FEATURE_CFLAGS += -D'NIC3COM_SUPPORT=1'
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OBJS += nic3com.o
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OBJS += nic3com.o
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161
bitbang_spi.c
Normal file
161
bitbang_spi.c
Normal file
@ -0,0 +1,161 @@
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/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include "flash.h"
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#include "spi.h"
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/* Length of half a clock period in usecs */
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int bitbang_half_period = 0;
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enum spi_bitbang_master spi_bitbang_master = SPI_BITBANG_INVALID;
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const struct spi_bitbang_master_entry spi_bitbang_master_table[] = {
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{}, /* This entry corresponds to SPI_BITBANG_INVALID. */
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};
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const int spi_bitbang_master_count = ARRAY_SIZE(spi_bitbang_master_table);
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void bitbang_set_cs(int val)
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{
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spi_bitbang_master_table[spi_bitbang_master].set_cs(val);
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}
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void bitbang_set_sck(int val)
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{
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spi_bitbang_master_table[spi_bitbang_master].set_sck(val);
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}
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void bitbang_set_mosi(int val)
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{
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spi_bitbang_master_table[spi_bitbang_master].set_mosi(val);
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}
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int bitbang_get_miso(void)
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{
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return spi_bitbang_master_table[spi_bitbang_master].get_miso();
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}
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int bitbang_spi_init(void)
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{
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bitbang_set_cs(1);
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bitbang_set_sck(0);
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buses_supported = CHIP_BUSTYPE_SPI;
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return 0;
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}
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uint8_t bitbang_spi_readwrite_byte(uint8_t val)
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{
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uint8_t ret = 0;
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int i;
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for (i = 7; i >= 0; i--) {
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bitbang_set_mosi((val >> i) & 1);
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programmer_delay(bitbang_half_period);
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bitbang_set_sck(1);
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ret <<= 1;
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ret |= bitbang_get_miso();
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programmer_delay(bitbang_half_period);
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bitbang_set_sck(0);
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}
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return ret;
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}
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int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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const unsigned char *writearr, unsigned char *readarr)
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{
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static unsigned char *bufout = NULL;
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static unsigned char *bufin = NULL;
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static int oldbufsize = 0;
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int bufsize = max(writecnt + readcnt, 260);
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int i;
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/* Arbitrary size limitation here. We're only constrained by memory. */
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if (writecnt > 65536 || readcnt > 65536)
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return SPI_INVALID_LENGTH;
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if (bufsize != oldbufsize) {
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bufout = realloc(bufout, bufsize);
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if (!bufout) {
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fprintf(stderr, "Out of memory!\n");
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if (bufin)
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free(bufin);
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exit(1);
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}
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bufin = realloc(bufout, bufsize);
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if (!bufin) {
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fprintf(stderr, "Out of memory!\n");
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if (bufout)
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free(bufout);
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exit(1);
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}
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}
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memcpy(bufout, writearr, writecnt);
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/* Shift out 0x00 while reading data. */
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memset(bufout + writecnt, 0x00, readcnt);
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/* Make sure any non-read data is 0xff. */
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memset(bufin + writecnt, 0xff, readcnt);
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bitbang_set_cs(0);
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for (i = 0; i < readcnt + writecnt; i++) {
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bufin[i] = bitbang_spi_readwrite_byte(bufout[i]);
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}
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programmer_delay(bitbang_half_period);
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bitbang_set_cs(1);
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programmer_delay(bitbang_half_period);
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memcpy(readarr, bufin + writecnt, readcnt);
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return 0;
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}
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int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
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{
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/* Maximum read length is unlimited, use 64k bytes. */
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return spi_read_chunked(flash, buf, start, len, 64 * 1024);
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}
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int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf)
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{
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int total_size = 1024 * flash->total_size;
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int i;
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printf_debug("total_size is %d\n", total_size);
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for (i = 0; i < total_size; i += 256) {
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int l, r;
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if (i + 256 <= total_size)
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l = 256;
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else
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l = total_size - i;
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if ((r = spi_nbyte_program(i, &buf[i], l))) {
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fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r);
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return 1;
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}
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while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
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/* loop */;
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}
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return 0;
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}
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23
flash.h
23
flash.h
@ -145,6 +145,21 @@ uint32_t chip_readl(const chipaddr addr);
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void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
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void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
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void programmer_delay(int usecs);
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void programmer_delay(int usecs);
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enum spi_bitbang_master {
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SPI_BITBANG_INVALID /* This must always be the last entry. */
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};
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extern const int spi_bitbang_master_count;
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extern enum spi_bitbang_master spi_bitbang_master;
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struct spi_bitbang_master_entry {
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void (*set_cs) (int val);
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void (*set_sck) (int val);
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void (*set_mosi) (int val);
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int (*get_miso) (void);
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};
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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enum chipbustype {
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enum chipbustype {
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@ -444,6 +459,14 @@ int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const u
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int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
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int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
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/* bitbang_spi.c */
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extern int bitbang_half_period;
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extern const struct spi_bitbang_master_entry spi_bitbang_master_table[];
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int bitbang_spi_init(void);
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int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
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int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
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/* flashrom.c */
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/* flashrom.c */
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extern char *programmer_param;
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extern char *programmer_param;
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extern int verbose;
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extern int verbose;
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@ -693,6 +693,12 @@ int main(int argc, char *argv[])
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fprintf(stderr, "SPI programmer table miscompilation!\n");
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fprintf(stderr, "SPI programmer table miscompilation!\n");
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exit(1);
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exit(1);
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}
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}
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#if BITBANG_SPI_SUPPORT == 1
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if (spi_bitbang_master_count - 1 != SPI_BITBANG_INVALID) {
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fprintf(stderr, "Bitbanging SPI master table miscompilation!\n");
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exit(1);
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}
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#endif
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setbuf(stdout, NULL);
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setbuf(stdout, NULL);
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while ((opt = getopt_long(argc, argv, optstring,
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while ((opt = getopt_long(argc, argv, optstring,
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