mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 23:22:37 +02:00
Add support for the AMIC A25L80P
This is a 1 MB SPI chip that seems to be straightforwardly related to the AMIC A25L40PU, which has half the capacity but is otherwise identical. Datasheet is at http://www.amictechnology.com/pdf/A25L80P.pdf flashrom -VE, -Vr, and -Vw has been tested using the AMD SB7x0 interface. Everything works fine... at least, I used it to upgrade my BIOS and I've been able to reboot. Corresponding to flashrom svn r1075. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
parent
4497e86134
commit
550f5c836c
31
flashchips.c
31
flashchips.c
@ -1219,6 +1219,37 @@ struct flashchip flashchips[] = {
|
||||
.read = spi_chip_read,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = "AMIC",
|
||||
.name = "A25L80P",
|
||||
.bustype = CHIP_BUSTYPE_SPI,
|
||||
.manufacture_id = AMIC_ID,
|
||||
.model_id = AMIC_A25L80P,
|
||||
.total_size = 1024,
|
||||
.page_size = 256,
|
||||
.tested = TEST_OK_PREW,
|
||||
.probe = probe_spi_rdid4,
|
||||
.probe_timing = TIMING_ZERO,
|
||||
.block_erasers =
|
||||
{
|
||||
{
|
||||
.eraseblocks = {
|
||||
{4 * 1024, 2},
|
||||
{8 * 1024, 1},
|
||||
{16 * 1024, 1},
|
||||
{32 * 1024, 1},
|
||||
{64 * 1024, 15},
|
||||
},
|
||||
.block_erase = spi_block_erase_d8,
|
||||
}, {
|
||||
.eraseblocks = { {1024 * 1024, 1} },
|
||||
.block_erase = spi_block_erase_c7,
|
||||
}
|
||||
},
|
||||
.write = spi_chip_write_256,
|
||||
.read = spi_chip_read,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = "AMIC",
|
||||
.name = "A29002B",
|
||||
|
@ -76,6 +76,7 @@
|
||||
#define AMIC_ID 0x7F37 /* AMIC */
|
||||
#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
|
||||
#define AMIC_A25L40P 0x2013
|
||||
#define AMIC_A25L80P 0x2014
|
||||
#define AMIC_A29002B 0x0d
|
||||
#define AMIC_A29002T 0x8C /* Same as A290021T */
|
||||
#define AMIC_A29040B 0x86
|
||||
|
Loading…
x
Reference in New Issue
Block a user