openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-11-04 07:00:39 +01:00
Code Issues Releases Wiki Activity

ichspi: Drop dev parameter from init functions

Browse Source 
It's never used and has no clear contract (e.g. will the pointer stay
valid beyond the call?).

Change-Id: I0d4e7cc731364e86eff214b9022b842a577f9ef4
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19460
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Nico Huber
2017-04-26 12:27:17 +02:00
committed by Nico Huber
parent 512059118e
commit 560111e2ce
3 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
chipset_enable.c
View File

@@ -718,7 +718,7 @@ static int enable_flash_ich_spi(struct pci_dev *dev, enum ich_chipset ich_genera
void *spibar = rcrb + spibar_offset; void *spibar = rcrb + spibar_offset;
/* This adds BUS_SPI */ /* This adds BUS_SPI */
int ret_spi = ich_init_spi(dev, spibar, ich_generation); int ret_spi = ich_init_spi(spibar, ich_generation);
if (ret_spi == ERROR_FATAL) if (ret_spi == ERROR_FATAL)
return ret_spi; return ret_spi;
@@ -846,7 +846,7 @@ static int enable_flash_silvermont(struct pci_dev *dev, const char *name)
*/ */
enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC); enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC);
int ret_spi = ich_init_spi(dev, spibar, ich_generation); int ret_spi = ich_init_spi(spibar, ich_generation);
if (ret_spi == ERROR_FATAL) if (ret_spi == ERROR_FATAL)
return ret_spi; return ret_spi;
@@ -949,12 +949,12 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name)
return ERROR_FATAL; return ERROR_FATAL;
} }
return via_init_spi(dev, spi0_mm_base); return via_init_spi(spi0_mm_base);
} }
static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name)
{ {
return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); return via_init_spi(pci_read_long(dev, 0xbc) << 8);
} }
static int enable_flash_cs5530(struct pci_dev *dev, const char *name) static int enable_flash_cs5530(struct pci_dev *dev, const char *name)

4
ichspi.c
View File

@@ -1561,7 +1561,7 @@ static const struct opaque_master opaque_master_ich_hwseq = {
.erase = ich_hwseq_block_erase, .erase = ich_hwseq_block_erase,
}; };
int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen) int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
{ {
int i; int i;
uint16_t tmp2; uint16_t tmp2;
@@ -1828,7 +1828,7 @@ static const struct spi_master spi_master_via = {
.write_aai = default_spi_write_aai, .write_aai = default_spi_write_aai,
}; };
int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) int via_init_spi(uint32_t mmio_base)
{ {
int i; int i;

4
programmer.h
View File

@@ -655,8 +655,8 @@ enum ich_chipset {
/* ichspi.c */ /* ichspi.c */
#if CONFIG_INTERNAL == 1 #if CONFIG_INTERNAL == 1
extern uint32_t ichspi_bbar; extern uint32_t ichspi_bbar;
int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation); int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); int via_init_spi(uint32_t mmio_base);
/* amd_imc.c */ /* amd_imc.c */
int amd_imc_shutdown(struct pci_dev *dev); int amd_imc_shutdown(struct pci_dev *dev);