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Introduce spi_block_erase_db()

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Used for page erase on some chips (e.g. Numonyx M45PE and
Sanyo LF25FW series).

Corresponding to flashrom svn r1682.

Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Nikolay Nikolaev 2013-06-28 21:28:37 +00:00 committed by Stefan Tauner
parent 278ba6e967
commit 579f1e0b67
3 changed files with 49 additions and 0 deletions
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1
chipdrivers.h
View File

@ -51,6 +51,7 @@ int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int b
int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte);

5
spi.h
View File

@ -106,6 +106,11 @@
#define JEDEC_SE_OUTSIZE 0x04
#define JEDEC_SE_INSIZE 0x00
/* Page Erase 0xDB */
#define JEDEC_PE 0xDB
#define JEDEC_PE_OUTSIZE 0x04
#define JEDEC_PE_INSIZE 0x00
/* Read Status Register */
#define JEDEC_RDSR 0x05
#define JEDEC_RDSR_OUTSIZE 0x01

43
spi25.c
View File

@ -565,6 +565,47 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr,
return 0;
}
/* Page erase (usually 256B blocks) */
int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
{
int result;
struct spi_command cmds[] = {
{
.writecnt = JEDEC_WREN_OUTSIZE,
.writearr = (const unsigned char[]){ JEDEC_WREN },
.readcnt = 0,
.readarr = NULL,
}, {
.writecnt = JEDEC_PE_OUTSIZE,
.writearr = (const unsigned char[]){
JEDEC_PE,
(addr >> 16) & 0xff,
(addr >> 8) & 0xff,
(addr & 0xff)
},
.readcnt = 0,
.readarr = NULL,
}, {
.writecnt = 0,
.writearr = NULL,
.readcnt = 0,
.readarr = NULL,
} };
result = spi_send_multicommand(flash, cmds);
if (result) {
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
return result;
}
/* Wait until the Write-In-Progress bit is cleared.
* This takes up to 20 ms usually (on worn out devices up to the 0.5s range), so wait in 1 ms steps. */
while (spi_read_status_register(flash) & SPI_SR_WIP)
programmer_delay(1 * 1000);
/* FIXME: Check the status register for errors. */
return 0;
}
/* Sector size is usually 4k, though Macronix eliteflash has 64k */
int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
unsigned int blocklen)
@ -745,6 +786,8 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
return &spi_block_erase_d7;
case 0xd8:
return &spi_block_erase_d8;
case 0xdb:
return &spi_block_erase_db;
default:
msg_cinfo("%s: unknown erase opcode (0x%02x). Please report "
"this at flashrom@flashrom.org\n", __func__, opcode);