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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-29 16:03:47 +02:00

sb600spi: rewrite and fix corner case

Specifying spispeed=reserved as programmer parameter resulted in
selecting the default SPI speed instead of aborting. Rewrite the logic
to be more readable.

Corresponding to flashrom svn r1949.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Carl-Daniel Hailfinger 2016-03-12 19:49:14 +00:00
parent 8e6565449b
commit 57cdd6ba66

View File

@ -387,24 +387,25 @@ static int set_mode(struct pci_dev *dev, uint8_t read_mode)
static int handle_speed(struct pci_dev *dev)
{
uint32_t tmp;
int8_t spispeed_idx = 3; /* Default to 16.5 MHz */
uint8_t spispeed_idx = 3; /* Default to 16.5 MHz */
char *spispeed = extract_programmer_param("spispeed");
if (spispeed != NULL) {
if (strcasecmp(spispeed, "reserved") != 0) {
int i;
for (i = 0; i < ARRAY_SIZE(spispeeds); i++) {
if (strcasecmp(spispeeds[i].name, spispeed) == 0) {
spispeed_idx = i;
break;
}
unsigned int i;
for (i = 0; i < ARRAY_SIZE(spispeeds); i++) {
if (strcasecmp(spispeeds[i].name, spispeed) == 0) {
spispeed_idx = i;
break;
}
/* Only Yangtze supports the second half of indices; no 66 MHz before SB8xx. */
if ((amd_gen < CHIPSET_YANGTZE && spispeed_idx > 3) ||
(amd_gen < CHIPSET_SB89XX && spispeed_idx == 0))
spispeed_idx = -1;
}
if (spispeed_idx < 0) {
/* "reserved" is not a valid speed.
* Error out on speeds not present in the spispeeds array.
* Only Yangtze supports the second half of indices.
* No 66 MHz before SB8xx. */
if ((strcasecmp(spispeed, "reserved") == 0) ||
(i == ARRAY_SIZE(spispeeds)) ||
(amd_gen < CHIPSET_YANGTZE && spispeed_idx > 3) ||
(amd_gen < CHIPSET_SB89XX && spispeed_idx == 0)) {
msg_perr("Error: Invalid spispeed value: '%s'.\n", spispeed);
free(spispeed);
return 1;