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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

flashchips: Add Spansion 25FL256S......0

The Spansion 25SFL256S supports 4BA through an extended address register,
a 4BA mode set by bit 7 of that register, or native 4BA instructions.
Enable the former only for now.

Unfortunately the S25SF256S uses another instruction to write the exten-
ded address register. So we add an override for the instruction byte.

Change-Id: I0a95a81dfe86434f049215ebd8477392391b9efc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Tested-by: Michael Fuckner <michael@fuckner.net>
Reviewed-on: https://review.coreboot.org/25132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber
2018-03-13 18:01:05 +01:00
parent 3eb5a8c82c
commit 57dbd64b33
3 changed files with 47 additions and 1 deletions

View File

@ -232,6 +232,9 @@ struct flashchip {
uint16_t max;
} voltage;
enum write_granularity gran;
/* SPI specific options (TODO: Make it a union in case other bustypes get specific options.) */
uint8_t wrea_override; /**< override opcode for write extended address register */
};
struct flashrom_flashctx {