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jlink_spi: add cs=tms option to jlink_spi programmer

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Currently, the code assumes the nCS pin of spi nor flash is connected to
either nRESET(pin 15) or nTRST(pin 3). But it is incompatible with the
pinout from official JFlash SPI, whereas the nCS pin is wired to TMS(pin
7).

This commit adds cs=tms option to share the same pinout as JFlash SPI.
It works by toggling TMS in assert_cs and deassert_cs, and sets TMS to
zero in jlink_spi_send_command. The default option is set to cs=reset
for backward compatibility.

Tested on macOS 13.3.1 with JLink and Winbond W25Q128

Change-Id: I0cb467fcc2c403a25f260462de0cd020e7022bb1
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/75011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
This commit is contained in:
Jiajie Chen
2023-05-09 00:27:01 +08:00
committed by Anastasia Klimchuk
parent fe2eea4d16
commit 592c1c3e5f
2 changed files with 43 additions and 15 deletions
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4
doc/classic_cli_manpage.rst
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@ -1066,7 +1066,7 @@ programmer which can be selected with the::
flashrom -p jlink_spi:cs=pin
syntax where ``pin`` can be either ``TRST`` or ``RESET``. The default pin for chip select is ``RESET``.
syntax where ``pin`` can be either ``TRST``, ``RESET`` or ``TMS``. The default pin for chip select is ``RESET``.
Note that, when using ``RESET``, it is normal that the indicator LED blinks orange or red.
Additionally, the ``Tref`` pin of the programmer must be attached to the logic level of the flash chip.
@ -1079,7 +1079,7 @@ Pinout for devices with 20-pin JTAG connector::
| 1 2 | 1: VTref 2:
| 3 4 | 3: TRST 4: GND
| 5 6 | 5: TDI 6: GND
+-+ 7 8 | 7: 8: GND
+-+ 7 8 | 7: TMS 8: GND
| 9 10 | 9: TCK 10: GND
| 11 12 | 11: 12: GND
+-+ 13 14 | 13: TDO 14: