diff --git a/flashchips.c b/flashchips.c
index 6764c3399..745cee5d2 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9574,6 +9574,42 @@ const struct flashchip flashchips[] = {
 		.voltage	= {1650, 3600},
 	},
 
+	{
+		.vendor		= "Macronix",
+		.name		= "MX25V4035F",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= MACRONIX_ID,
+		.model_id	= MACRONIX_MX25V4035F,
+		.total_size	= 512,
+		.page_size	= 256,
+		/* OTP: 8KiB total; enter 0xB1, exit 0xC1 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_SCUR,
+		.tested		= TEST_UNTESTED,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { { 4 * 1024, 128} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				.eraseblocks = { {32 * 1024,  16} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				.eraseblocks = { {64 * 1024,   8} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			}
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
+		.write		= SPI_CHIP_WRITE256, /* Multi I/O supported */
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2300, 3600},
+	},
+
 	{
 		.vendor		= "Macronix",
 		.name		= "MX25U12835F",
diff --git a/include/flashchips.h b/include/flashchips.h
index 5df42dcf0..58a6d0e61 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -512,6 +512,7 @@
 #define MACRONIX_MX25L1635E	0x2515	/* MX25L1635{E} */
 #define MACRONIX_MX66L51235F	0x201a	/* MX66L51235F, MX25L51245G */
 #define MACRONIX_MX66L1G45G	0x201b	/* MX66L1G45G */
+#define MACRONIX_MX25V4035F	0x2313
 #define MACRONIX_MX25U8032E	0x2534
 #define MACRONIX_MX25U1635E	0x2535
 #define MACRONIX_MX25U3235E	0x2536	/* Same as MX25U6435F */