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	flashchips: Add MT35XU02G
Add initial support for Micron MT35XU02G. Tested probe, read, write, and erase via linux_spi [0]. [0]: https://paste.flashrom.org/view.php?id=3778 Change-Id: I28eb0ce202b6e45ab3a72dca07f2f8c3b4cfb1b2 Signed-off-by: Jacob Zarnstorff <jacobzarnstorff@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/89686 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Vincent Fazio <vfazio@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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					committed by
					
						
						Anastasia Klimchuk
					
				
			
			
				
	
			
			
			
						parent
						
							bc3f2f84f9
						
					
				
				
					commit
					5c3fd47332
				
			@@ -476,3 +476,55 @@
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		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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		.voltage	= {1700, 2000},
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	},
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	{
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		.vendor		= "Micron",
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		.name		= "MT35XU02G", /* U = 1.8V, uniform 128KB/4KB blocks/sectors */
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		.bustype	= BUS_SPI,
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		.manufacture_id	= MICRON_ID,
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		.model_id	= MICRON_MT35XU02GCBA,
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		.total_size	= 256 * 1024,
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		.page_size	= 256,
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		/* supports SFDP */
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		/* OTP: 64B total; read 0x4B, write 0x42 */
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		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
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		.tested		= TEST_OK_PREW,
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		.probe		= PROBE_SPI_RDID,
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		.probe_timing	= TIMING_ZERO,
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		.block_erasers	=
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		{
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			{
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				.eraseblocks = { {4 * 1024, 65536} },
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				.block_erase = SPI_BLOCK_ERASE_21,
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			}, {
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				.eraseblocks = { {4 * 1024, 65536} },
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				.block_erase = SPI_BLOCK_ERASE_20,
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			}, {
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				.eraseblocks = { {32 * 1024, 8192} },
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				.block_erase = SPI_BLOCK_ERASE_5C,
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			}, {
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				.eraseblocks = { {32 * 1024, 8192} },
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				.block_erase = SPI_BLOCK_ERASE_52,
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			}, {
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				.eraseblocks = { {128 * 1024, 2048} },
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				.block_erase = SPI_BLOCK_ERASE_DC,
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			}, {
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				.eraseblocks = { {128 * 1024, 2048} },
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				.block_erase = SPI_BLOCK_ERASE_D8,
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			}, {
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				.eraseblocks = { {65536 * 1024, 4} },
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				.block_erase = SPI_BLOCK_ERASE_C4,
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			}
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		},
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		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */
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		.unlock		= SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 128kB sector lock registers */
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		.write		= SPI_CHIP_WRITE256, /* Multi I/O supported */
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		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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		.voltage	= {1700, 2000},
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		.reg_bits	=
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		{
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			.srp    = {STATUS1, 7, RW},
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			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 6, RW}},
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			.tb     = {STATUS1, 5, RW},
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		},
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	},
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