From 5c5247d60e852dc14d7f635b8eaf8ffe67465ac2 Mon Sep 17 00:00:00 2001
From: Gerrit Code Review <root@gerrit>
Date: Thu, 29 Sep 2022 17:04:53 +0000
Subject: [PATCH] Update notes for submitted changes

* chipset_enable.c: Disable SPI on ICH7 if booted from LPC
---
 39/9a4dd721a64a1d22e2f8028cc39d6496515ed6 | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 39/9a4dd721a64a1d22e2f8028cc39d6496515ed6

diff --git a/39/9a4dd721a64a1d22e2f8028cc39d6496515ed6 b/39/9a4dd721a64a1d22e2f8028cc39d6496515ed6
new file mode 100644
index 000000000..2a9b1e3f8
--- /dev/null
+++ b/39/9a4dd721a64a1d22e2f8028cc39d6496515ed6
@@ -0,0 +1,9 @@
+Verified+1: build bot (Jenkins) <no-reply@coreboot.org>
+Code-Review+2: Elyes Haouas <ehaouas@noos.fr>
+Code-Review+2: Felix Singer <felixsinger@posteo.net>
+Code-Review+2: Angel Pons <th3fanbus@gmail.com>
+Submitted-by: Felix Singer <felixsinger@posteo.net>
+Submitted-at: Thu, 29 Sep 2022 17:04:53 +0000
+Reviewed-on: https://review.coreboot.org/c/flashrom/+/67863
+Project: flashrom
+Branch: refs/heads/1.2.x