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4BA: Support for 4-bytes addressing via Extended Address Register

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On some flash chips data with addresses more than 24-bit field
can address may be accessed by using Extended Address Register.
The register has 1-byte size and stores high byte of 32-bit address.
Then flash can be read from 3-bytes addressing mode with writing
high byte of address to this Register. By using this way we have
access to full memory of a chip. Some chips may support this method
only.

This patch provides code use Extended Address Register.

Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c

flash.h
+ feature definitions added

flashrom.c
+ modified switch to 4-bytes addressing to support extended address register

spi4ba.h
+ definitions for 4-bytes addressing JEDEC commands
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)

spi4ba.c
+ functions for write Extended Address Register
+ functions for read/write/erase with Extended Address Register

Change-Id: I09a8aa11de2ca14901f142c67c83c4fa0def4e27
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
      https://www.flashrom.org/pipermail/flashrom/2015-January/013200.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-on: https://review.coreboot.org/20507
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Boris Baykov
2016-06-11 18:29:02 +02:00
committed by Nico Huber
parent aa6c37444c
commit 5de3b9b726
5 changed files with 361 additions and 2 deletions
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20
spi4ba.h
View File

@ -36,6 +36,16 @@
#define JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE 0x01
#define JEDEC_EXIT_4_BYTE_ADDR_MODE_INSIZE 0x00
/* Write Extended Address Register */
#define JEDEC_WRITE_EXT_ADDR_REG 0xC5
#define JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE 0x02
#define JEDEC_WRITE_EXT_ADDR_REG_INSIZE 0x00
/* Read Extended Address Register */
#define JEDEC_READ_EXT_ADDR_REG 0xC8
#define JEDEC_READ_EXT_ADDR_REG_OUTSIZE 0x01
#define JEDEC_READ_EXT_ADDR_REG_INSIZE 0x01
/* enter 4-bytes addressing mode */
int spi_enter_4ba_b7(struct flashctx *flash);
int spi_enter_4ba_b7_we(struct flashctx *flash);
@ -50,5 +60,15 @@ int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned i
int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
/* read/write flash bytes from 3-bytes addressing mode using extended address register */
int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte);
int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
/* erase flash bytes from 3-bytes addressing mode using extended address register */
int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
#endif /* __SPI_4BA_H__ */