diff --git a/board_enable.c b/board_enable.c
index d7408064c..7b9e9f64b 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1555,26 +1555,20 @@ static int intel_ich_gpio_set(int gpio, int raise)
 	int i, allowed;
 
 	/* First, look for a known LPC bridge */
-	for (dev = pacc->devices; dev; dev = dev->next) {
-		uint16_t device_class;
-		/* libpci before version 2.2.4 does not store class info. */
-		device_class = pci_read_word(dev, PCI_CLASS_DEVICE);
-		if ((dev->vendor_id == 0x8086) &&
-		    (device_class == 0x0601)) { /* ISA bridge */
-			/* Is this device in our list? */
-			for (i = 0; intel_ich_gpio_table[i].id; i++)
-				if (dev->device_id == intel_ich_gpio_table[i].id)
-					break;
-
-			if (intel_ich_gpio_table[i].id)
-				break;
-		}
-	}
-
+	dev = pcidev_find_vendorclass(0x8086, 0x0601); /* ISA bridge */
 	if (!dev) {
 		msg_perr("\nERROR: No known Intel LPC bridge found.\n");
 		return -1;
 	}
+	/* Is this device in our list? */
+	for (i = 0; intel_ich_gpio_table[i].id; i++)
+		if (dev->device_id == intel_ich_gpio_table[i].id)
+			break;
+
+	if (!intel_ich_gpio_table[i].id) {
+		msg_perr("\nERROR: No known Intel LPC bridge found.\n");
+		return -1;
+	}
 
 	/*
 	 * According to the datasheets, all Intel ICHs have the GPIO bar 5:1