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Add sst39vf020 support
Corresponding to coreboot v1 svn r606.
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parent
b193490201
commit
6041bcda7a
1
flash.h
1
flash.h
@ -28,6 +28,7 @@ struct flashchip {
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#define SST_29EE020A 0x10 /* SST 29EE020 device code */
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#define SST_28SF040 0x04 /* SST 29EE040 device code */
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#define SST_39SF020 0xB6 /* SST 39SF020 device */
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#define SST_39VF020 0xD6 /* SST 39SF020 device */
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#define WINBOND_ID 0xDA /* Winbond Manufacture ID code */
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#define W_29C020C 0x45 /* Winbond w29c020c device code*/
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@ -50,6 +50,8 @@ struct flashchip flashchips[] = {
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probe_28sf040, erase_28sf040, write_28sf040},
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{"SST39SF020A", SST_ID, SST_39SF020, NULL, 256, 4096,
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probe_39sf020, erase_39sf020, write_39sf020},
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{"SST39VF020", SST_ID, SST_39VF020, NULL, 256, 4096,
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probe_39sf020, erase_39sf020, write_39sf020},
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{"W29C020C", WINBOND_ID, W_29C020C, NULL, 256, 128,
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probe_jedec, erase_jedec, write_jedec},
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{"M29F400BT", ST_ID, ST_M29F400BT , NULL, 512, 64*1024,
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@ -99,7 +99,8 @@ static __inline__ write_sector_39sf020(volatile char * bios,
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*Temp = 0xA0;
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*dst = *src;
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toggle_ready_jedec(bios);
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if (*dst != *src) printf("BAD! dst 0x%x val 0x%x src 0x%x\n",
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if (*dst != *src)
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printf("BAD! dst 0x%x val 0x%x src 0x%x\n",
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dst, *dst, *src);
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dst++, src++;
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}
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@ -138,8 +139,8 @@ int erase_39sf020 (struct flashchip * flash)
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{
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volatile unsigned char * bios = flash->virt_addr;
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volatile unsigned char *Temp;
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/* Issue the Sector Erase command to 39SF020 */
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printf(__FUNCTION__ " bios is %p\n", bios);
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Temp = bios + 0x5555; /* set up address to be C000:5555h */
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*Temp = 0xAA; /* write data 0xAA to the address */
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myusec_delay(10);
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