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chipset_enable: add PCI ID for APL-I (Broxton)

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Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Signed-off-by: Henning Schild <henning.schild@siemens.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/42805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Jan Samek 2020-01-08 12:35:14 +01:00 committed by Angel Pons
parent 174a0c1b40
commit 62027c8e37
1 changed files with 1 additions and 0 deletions
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chipset_enable.c
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@ -2052,6 +2052,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100},
{0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100},
{0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl},
{0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl},
{0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300},
{0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300},
{0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300},