mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-03 06:53:18 +02:00
Simplify hwaccess.c
Previously the code was focused on architectures which led to lots of duplicate code and spread the information regarding differences between the architectures accross the file. With this patch there is a single function header for any function and the differentiation between architectures (and OS where needed) happens in one place for each function. Also, this patch adds simple defines to bundle often used arch and os checks. A central check for unknown architectures and OSes has been added on top. Corresponding to flashrom svn r1638. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:

committed by
Stefan Tauner

parent
57794ac158
commit
6282966cc0
118
hwaccess.c
118
hwaccess.c
@ -18,6 +18,20 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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*/
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#define IS_X86 (defined(__i386__) || defined(__x86_64__) || defined(__amd64__))
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#define IS_MIPS (defined (__mips) || defined (__mips__) || defined (__MIPS__) || defined (mips))
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#define IS_PPC (defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__))
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#define IS_ARM (defined (__arm__) || defined (_ARM))
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#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM)
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#error Unknown architecture
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#endif
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#define IS_BSD (defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__OpenBSD__))
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#define IS_LINUX (defined(__gnu_linux__) || defined(__linux__))
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#if !(IS_BSD || IS_LINUX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun))
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#error "Unknown operating system"
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#endif
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#include <stdint.h>
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#include <stdint.h>
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#include <string.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdlib.h>
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@ -32,30 +46,39 @@
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#include "flash.h"
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#include "flash.h"
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#include "hwaccess.h"
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#include "hwaccess.h"
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#if defined(__i386__) || defined(__x86_64__)
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#if IS_X86 && IS_BSD
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/* sync primitive is not needed because x86 uses uncached accesses
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* which have a strongly ordered memory model.
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*/
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static inline void sync_primitive(void)
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{
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}
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#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
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int io_fd;
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int io_fd;
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#endif
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#endif
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int release_io_perms(void *p)
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/* Prevent reordering and/or merging of reads/writes to hardware.
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* Such reordering and/or merging would break device accesses which depend on the exact access order.
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*/
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static inline void sync_primitive(void)
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{
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{
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/* This is needed only on PowerPC because...
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* - x86 uses uncached accesses which have a strongly ordered memory model and
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* - MIPS uses uncached accesses in mode 2 on /dev/mem which has also a strongly ordered memory model
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* - ARM uses a strongly ordered memory model for device memories.
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*/
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#if IS_PPC
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asm("eieio" : : : "memory");
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#endif
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}
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static int release_io_perms(void *p)
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{
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#if IS_X86
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#if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
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#if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
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#else
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/* Nothing to release */
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#if defined (__sun) && (defined(__i386) || defined(__amd64))
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#elif defined (__sun)
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sysi86(SI86V86, V86SC_IOPL, 0);
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sysi86(SI86V86, V86SC_IOPL, 0);
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#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
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#elif IS_BSD
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close(io_fd);
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close(io_fd);
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#else
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#elif IS_LINUX
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iopl(0);
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iopl(0);
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#endif
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#endif
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#else
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/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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@ -63,80 +86,31 @@ int release_io_perms(void *p)
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/* Get I/O permissions with automatic permission release on shutdown. */
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/* Get I/O permissions with automatic permission release on shutdown. */
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int rget_io_perms(void)
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int rget_io_perms(void)
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{
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{
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#if IS_X86
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#if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
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#if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
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/* We have full permissions by default. */
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/* We have full permissions by default. */
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return 0;
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#elif defined (__sun)
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#else
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#if defined (__sun) && (defined(__i386) || defined(__amd64))
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if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
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if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
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#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
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#elif IS_BSD
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if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
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if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
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#else
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#elif IS_LINUX
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if (iopl(3) != 0) {
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if (iopl(3) != 0) {
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#endif
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#endif
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msg_perr("ERROR: Could not get I/O privileges (%s).\n"
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msg_perr("ERROR: Could not get I/O privileges (%s).\n"
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"You need to be root.\n", strerror(errno));
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"You need to be root.\n", strerror(errno));
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#if defined (__OpenBSD__)
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#if defined (__OpenBSD__)
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msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "
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msg_perr("Please set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into \n");
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"and reboot, or reboot into \n");
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msg_perr("single user mode.\n");
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msg_perr("single user mode.\n");
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#endif
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#endif
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return 1;
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return 1;
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} else {
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} else {
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register_shutdown(release_io_perms, NULL);
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register_shutdown(release_io_perms, NULL);
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}
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}
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return 0;
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#endif
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}
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#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
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static inline void sync_primitive(void)
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{
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/* Prevent reordering and/or merging of reads/writes to hardware.
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* Such reordering and/or merging would break device accesses which
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* depend on the exact access order.
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*/
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___asm___ volatile ("eieio" : : : "memory");
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}
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/* PCI port I/O is not yet implemented on PowerPC. */
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int rget_io_perms(void)
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{
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return 0;
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}
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#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)
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/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses
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* in mode 2 which has a strongly ordered memory model.
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*/
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static inline void sync_primitive(void)
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{
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}
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/* PCI port I/O is not yet implemented on MIPS. */
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int rget_io_perms(void)
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{
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return 0;
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}
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#elif defined (__arm__)
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static inline void sync_primitive(void)
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{
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}
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int rget_io_perms(void)
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{
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return 0;
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}
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#else
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#else
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/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
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#error Unknown architecture
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#endif
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#endif
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return 0;
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}
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void mmio_writeb(uint8_t val, void *addr)
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void mmio_writeb(uint8_t val, void *addr)
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{
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{
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