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mirror of https://review.coreboot.org/flashrom.git synced 2025-05-01 00:43:40 +02:00

ichspi: Extract handling programmer param into a function

Extract processing of ich_spi_mode into a separate function which
is called from init_ich_default. This makes init_ich_default more
readable and avoids one local variable.

BUG=b:204488958
TEST=Check that the following scenarios still behave properly:
1) probe-read-verify-erase section-write-reboot
on Intel octopus board with GD25LQ128C/GD25LQ128D/GD25LQ128E
2) probe and read on Panther Point (7 series PCH)

Change-Id: I20e2379a6fd58c9346f0a2d6daf2b8decf1f6976
Tested-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: Nico Huber <nico.h@gmx.de>
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Anastasia Klimchuk 2021-10-29 15:01:05 +11:00 committed by Nico Huber
parent 0d7767ecdb
commit 6293790293

View File

@ -1752,20 +1752,48 @@ static int init_ich7_spi(void *spibar, enum ich_chipset ich_gen)
return 0; return 0;
} }
enum ich_spi_mode {
ich_auto,
ich_hwseq,
ich_swseq
};
static int get_ich_spi_mode_param(enum ich_spi_mode *ich_spi_mode)
{
char *const arg = extract_programmer_param("ich_spi_mode");
if (arg && !strcmp(arg, "hwseq")) {
*ich_spi_mode = ich_hwseq;
msg_pspew("user selected hwseq\n");
} else if (arg && !strcmp(arg, "swseq")) {
*ich_spi_mode = ich_swseq;
msg_pspew("user selected swseq\n");
} else if (arg && !strcmp(arg, "auto")) {
msg_pspew("user selected auto\n");
*ich_spi_mode = ich_auto;
} else if (arg && !strlen(arg)) {
msg_perr("Missing argument for ich_spi_mode.\n");
free(arg);
return ERROR_FATAL;
} else if (arg) {
msg_perr("Unknown argument for ich_spi_mode: %s\n", arg);
free(arg);
return ERROR_FATAL;
}
free(arg);
return 0;
}
static int init_ich_default(void *spibar, enum ich_chipset ich_gen) static int init_ich_default(void *spibar, enum ich_chipset ich_gen)
{ {
unsigned int i; unsigned int i;
uint16_t tmp2; uint16_t tmp2;
uint32_t tmp; uint32_t tmp;
char *arg;
int ich_spi_rw_restricted = 0; int ich_spi_rw_restricted = 0;
int desc_valid = 0; int desc_valid = 0;
struct ich_descriptors desc = { 0 }; struct ich_descriptors desc = { 0 };
enum ich_spi_mode { enum ich_spi_mode ich_spi_mode = ich_auto;
ich_auto,
ich_hwseq,
ich_swseq
} ich_spi_mode = ich_auto;
size_t num_freg, num_pr, reg_pr0; size_t num_freg, num_pr, reg_pr0;
/* Moving registers / bits */ /* Moving registers / bits */
@ -1818,27 +1846,9 @@ static int init_ich_default(void *spibar, enum ich_chipset ich_gen)
break; break;
} }
arg = extract_programmer_param("ich_spi_mode"); int ret = get_ich_spi_mode_param(&ich_spi_mode);
if (arg && !strcmp(arg, "hwseq")) { if (ret)
ich_spi_mode = ich_hwseq; return ret;
msg_pspew("user selected hwseq\n");
} else if (arg && !strcmp(arg, "swseq")) {
ich_spi_mode = ich_swseq;
msg_pspew("user selected swseq\n");
} else if (arg && !strcmp(arg, "auto")) {
msg_pspew("user selected auto\n");
ich_spi_mode = ich_auto;
} else if (arg && !strlen(arg)) {
msg_perr("Missing argument for ich_spi_mode.\n");
free(arg);
return ERROR_FATAL;
} else if (arg) {
msg_perr("Unknown argument for ich_spi_mode: %s\n",
arg);
free(arg);
return ERROR_FATAL;
}
free(arg);
tmp2 = mmio_readw(spibar + ICH9_REG_HSFS); tmp2 = mmio_readw(spibar + ICH9_REG_HSFS);
msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);