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flashchips: Enable FEATURE_4BA_EAR_1716 for S25FL512S

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According to its datasheet, Spansion S25FL512S supports writing/
reading its extended address register via 0x17/0x16 opcodes. With
that enabled, we can also enable the EAR7 feature, i.e. toggling
4BA mode via bit 7 of that register.

S25FL512S did not advertise EAR support at all, so we set it to
TEST_UNTESTED again.

Change-Id: Ib214e509a5c294ab60460a2b5d00a713a119ab3f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
This commit is contained in:
Nico Huber 2022-06-20 19:37:37 +02:00 committed by Nico Huber
parent e8ce432faa
commit 62b020ac5f
1 changed files with 3 additions and 2 deletions
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flashchips.c
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@ -16843,8 +16843,9 @@ const struct flashchip flashchips[] = {
.total_size = 65536, /* 512 Mb (=> 64 MB)) */ .total_size = 65536, /* 512 Mb (=> 64 MB)) */
.page_size = 256, .page_size = 256,
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_NATIVE, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP |
.tested = TEST_OK_PREW, FEATURE_4BA_NATIVE | FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EAR_1716,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid, .probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO, .probe_timing = TIMING_ZERO,
.block_erasers = .block_erasers =