mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-01 14:11:15 +02:00
Add a bunch of new/tested stuff and various small changes 21
Tested mainboards: OK: - ASUS F2A85-M Reported by various corebooters - ASUS M2N-MX SE Plus Reported by Antonio - ASUS P5LD2 Reported by François Revol - Lenovo ThinkPad T530 Reported and partially authored by Edward O'Callaghan - MSI MS-7502 (Medion MD8833) Reported by naq on IRC - Shuttle AB61 Reported by olofolleola4 - ZOTAC IONITX-F-E Reported by Bernardo Kuri Flash chips: - Atmel AT45DB021D to PREW (+PREW) Reported by The Raven - Atmel AT25F4096 to PREW (+PREW) Reported by 공준혁 - GigaDevice GD25Q16(B) to PREW (+PREW) Reported by luxflow@live.com using a GD25Q16BSIG - Catalyst CAT28F512 Mark erase and write as known bad (not implemented) Miscellaneous: - Various spelling corrections by Daniele Forsi. - Added and refined a bunch of chips originally investigated by Carl-Daniel. - Marked the ARM-USB-OCD-H programmer as tested (reported by Ruud Schramp). - Tiny other stuff. Corresponding to flashrom svn r1839. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
@ -74,7 +74,7 @@ Additional information of the above commands:
|
||||
Send and receive bytes via SPI.
|
||||
Maximum slen is Q_WRNMAXLEN in case Q_BUSTYPE returns SPI only or S_BUSTYPE was used
|
||||
to set SPI exclusively before. Same for rlen and Q_RDNMAXLEN.
|
||||
This operation is immediate, meaning it doesnt use the operation buffer.
|
||||
This operation is immediate, meaning it doesn't use the operation buffer.
|
||||
0x14 (S_SPI_FREQ):
|
||||
Set the SPI clock frequency. The 32-bit value indicates the
|
||||
requested frequency in Hertz. Value 0 is reserved and should
|
||||
|
Reference in New Issue
Block a user