mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-01 22:21:16 +02:00
Add a bunch of new/tested stuff and various small changes 21
Tested mainboards: OK: - ASUS F2A85-M Reported by various corebooters - ASUS M2N-MX SE Plus Reported by Antonio - ASUS P5LD2 Reported by François Revol - Lenovo ThinkPad T530 Reported and partially authored by Edward O'Callaghan - MSI MS-7502 (Medion MD8833) Reported by naq on IRC - Shuttle AB61 Reported by olofolleola4 - ZOTAC IONITX-F-E Reported by Bernardo Kuri Flash chips: - Atmel AT45DB021D to PREW (+PREW) Reported by The Raven - Atmel AT25F4096 to PREW (+PREW) Reported by 공준혁 - GigaDevice GD25Q16(B) to PREW (+PREW) Reported by luxflow@live.com using a GD25Q16BSIG - Catalyst CAT28F512 Mark erase and write as known bad (not implemented) Miscellaneous: - Various spelling corrections by Daniele Forsi. - Added and refined a bunch of chips originally investigated by Carl-Daniel. - Marked the ARM-USB-OCD-H programmer as tested (reported by Ruud Schramp). - Tiny other stuff. Corresponding to flashrom svn r1839. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
70
flashchips.c
70
flashchips.c
@ -1994,7 +1994,7 @@ const struct flashchip flashchips[] = {
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.total_size = 512,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_WREN,
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.tested = TEST_UNTESTED,
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.tested = TEST_OK_PREW,
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.probe = probe_spi_at25f,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -2477,7 +2477,7 @@ const struct flashchip flashchips[] = {
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/* does not support EWSR nor WREN and has no writable status register bits whatsoever */
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/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
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.feature_bits = FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.tested = TEST_OK_PREW,
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.probe = probe_spi_at45db,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -3158,7 +3158,7 @@ const struct flashchip flashchips[] = {
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.total_size = 64,
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.page_size = 0, /* unused */
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.feature_bits = 0,
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.tested = TEST_OK_PR,
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.tested = {.probe = OK, .read = OK, .erase = BAD, .write = BAD },
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.probe = probe_jedec, /* FIXME! */
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -5433,7 +5433,7 @@ const struct flashchip flashchips[] = {
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.page_size = 256,
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/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.tested = TEST_OK_PREW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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@ -6627,7 +6627,7 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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},
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6: Continously Program (CP) mode */
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.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6: Continuously Program (CP) mode */
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */
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@ -7641,7 +7641,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {512 * 1024, 1} },
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@ -10242,9 +10242,9 @@ const struct flashchip flashchips[] = {
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}
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd,
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.write = spi_chip_write_256,
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.read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */
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.read = spi_chip_read, /* Fast read (0x0B) and dual I/O (0x3B) supported */
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.voltage = {2700, 3600},
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},
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@ -10276,15 +10276,15 @@ const struct flashchip flashchips[] = {
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}
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd,
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.write = spi_chip_write_256,
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.read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */
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.read = spi_chip_read, /* Fast read (0x0B) and dual I/O (0x3B) supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Spansion",
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.name = "S25FL116K/S25FL216K",
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.name = "S25FL116K/S25FL216K", /* FIXME: separate them */
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.bustype = BUS_SPI,
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.manufacture_id = SPANSION_ID,
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.model_id = SPANSION_S25FL216,
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@ -10311,9 +10311,9 @@ const struct flashchip flashchips[] = {
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}
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},
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.printlock = spi_prettyprint_status_register_bp3_srwd,
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */
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.write = spi_chip_write_256,
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.read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */
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.read = spi_chip_read, /* Fast read (0x0B) and dual I/O (0x3B) supported */
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.voltage = {2700, 3600},
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},
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@ -10702,10 +10702,10 @@ const struct flashchip flashchips[] = {
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{
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.vendor = "SST",
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.name = "SST25VF512A",
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.name = "SST25VF512(A)",
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.bustype = BUS_SPI,
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.manufacture_id = SST_ID,
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.model_id = SST_SST25VF512A_REMS,
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.model_id = SST_SST25VF512_REMS,
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.total_size = 64,
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.page_size = 256,
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.feature_bits = FEATURE_WRSR_EWSR,
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@ -10722,25 +10722,25 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {32 * 1024, 2} },
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.block_erase = spi_block_erase_d8,
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.block_erase = spi_block_erase_d8, /* Supported by SST25VF512A only */
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}, {
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.eraseblocks = { {64 * 1024, 1} },
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.block_erase = spi_block_erase_60,
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}, {
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.eraseblocks = { {64 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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.block_erase = spi_block_erase_c7, /* Supported by SST25VF512A only */
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},
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},
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.printlock = spi_prettyprint_status_register_sst25, /* FIXME: No BP2 & 3 */
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */
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.read = spi_chip_read, /* Fast read (0x0B) supported */
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.read = spi_chip_read, /* Fast read (0x0B) supported by SST25VF512A only */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "SST",
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.name = "SST25VF010",
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.name = "SST25VF010(A)",
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.bustype = BUS_SPI,
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.manufacture_id = SST_ID,
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.model_id = SST_SST25VF010_REMS,
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@ -10760,19 +10760,19 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_52,
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}, {
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.eraseblocks = { {32 * 1024, 4} },
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.block_erase = spi_block_erase_d8,
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.block_erase = spi_block_erase_d8, /* Supported by SST25VF010A only */
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}, {
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.eraseblocks = { {128 * 1024, 1} },
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.block_erase = spi_block_erase_60,
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}, {
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.eraseblocks = { {128 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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.block_erase = spi_block_erase_c7, /* Supported by SST25VF010A only */
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},
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},
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.printlock = spi_prettyprint_status_register_sst25, /* FIXME: No BP2 & 3 */
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */
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.read = spi_chip_read, /* Fast read (0x0B) supported */
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.read = spi_chip_read, /* Fast read (0x0B) supported by SST25VF010A only */
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.voltage = {2700, 3600},
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},
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@ -12157,7 +12157,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {512 * 1024, 1} },
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@ -12249,7 +12249,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {16 * 1024, 8}, },
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.eraseblocks = { {16 * 1024, 8} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {128 * 1024, 1} },
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@ -12276,7 +12276,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {512 * 1024, 1} },
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@ -12335,7 +12335,7 @@ const struct flashchip flashchips[] = {
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},
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.block_erase = erase_sector_stm50,
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}, {
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12368,7 +12368,7 @@ const struct flashchip flashchips[] = {
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},
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.block_erase = erase_sector_stm50,
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}, {
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12401,7 +12401,7 @@ const struct flashchip flashchips[] = {
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},
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.block_erase = erase_sector_stm50,
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}, {
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.eraseblocks = { {64 * 1024, 16}, },
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12435,7 +12435,7 @@ const struct flashchip flashchips[] = {
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},
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.block_erase = erase_sector_stm50,
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}, {
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.eraseblocks = { {64 * 1024, 16}, },
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12495,7 +12495,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 32}, },
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.eraseblocks = { {64 * 1024, 32} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12520,7 +12520,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12545,7 +12545,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 16}, },
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -12570,7 +12570,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 16}, },
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = erase_block_82802ab,
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}
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},
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@ -14318,7 +14318,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 16}, },
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.eraseblocks = { {64 * 1024, 16} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {1024 * 1024, 1} },
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@ -14347,7 +14347,7 @@ const struct flashchip flashchips[] = {
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8}, },
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = erase_sector_jedec,
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}, {
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.eraseblocks = { {512 * 1024, 1} },
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