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Use getpagesize() to determine the physmap's length in nicintel_spi.c
Corresponding to flashrom svn r1584. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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@ -26,11 +26,13 @@
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*/
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*/
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include "flash.h"
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#include "flash.h"
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#include "programmer.h"
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#include "programmer.h"
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#include "hwaccess.h"
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#include "hwaccess.h"
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#define PCI_VENDOR_ID_INTEL 0x8086
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#define PCI_VENDOR_ID_INTEL 0x8086
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#define MEMMAP_SIZE getpagesize()
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/* EEPROM/Flash Control & Data Register */
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/* EEPROM/Flash Control & Data Register */
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#define EECD 0x10
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#define EECD 0x10
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@ -157,7 +159,7 @@ static int nicintel_spi_shutdown(void *data)
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tmp |= FLASH_WRITES_DISABLED;
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tmp |= FLASH_WRITES_DISABLED;
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pci_mmio_writel(tmp, nicintel_spibar + EECD);
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pci_mmio_writel(tmp, nicintel_spibar + EECD);
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physunmap(nicintel_spibar, 4096);
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physunmap(nicintel_spibar, MEMMAP_SIZE);
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pci_cleanup(pacc);
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pci_cleanup(pacc);
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return 0;
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return 0;
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@ -173,7 +175,7 @@ int nicintel_spi_init(void)
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
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io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
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nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
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nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
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io_base_addr, 4096);
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io_base_addr, MEMMAP_SIZE);
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/* Automatic restore of EECD on shutdown is not possible because EECD
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/* Automatic restore of EECD on shutdown is not possible because EECD
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* does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED,
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* does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED,
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* but other bits with side effects as well. Those other bits must be
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* but other bits with side effects as well. Those other bits must be
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