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Use getpagesize() to determine the physmap's length in nicintel_spi.c

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Corresponding to flashrom svn r1584.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner 2012-08-26 21:50:36 +00:00
parent 7bf4ed9277
commit 6745d6f39d
1 changed files with 4 additions and 2 deletions
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6
nicintel_spi.c
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@ -26,11 +26,13 @@
*/
#include <stdlib.h>
#include <unistd.h>
#include "flash.h"
#include "programmer.h"
#include "hwaccess.h"
#define PCI_VENDOR_ID_INTEL 0x8086
#define MEMMAP_SIZE getpagesize()
/* EEPROM/Flash Control & Data Register */
#define EECD 0x10
@ -157,7 +159,7 @@ static int nicintel_spi_shutdown(void *data)
tmp |= FLASH_WRITES_DISABLED;
pci_mmio_writel(tmp, nicintel_spibar + EECD);
physunmap(nicintel_spibar, 4096);
physunmap(nicintel_spibar, MEMMAP_SIZE);
pci_cleanup(pacc);
return 0;
@ -173,7 +175,7 @@ int nicintel_spi_init(void)
io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
io_base_addr, 4096);
io_base_addr, MEMMAP_SIZE);
/* Automatic restore of EECD on shutdown is not possible because EECD
* does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED,
* but other bits with side effects as well. Those other bits must be