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ichspi.c: Make pprinters parametric on ich_generation
Make the two prettyprint functions pure by taking the ich_generation value as a function parameter over a global variable: * prettyprint_ich9_reg_hsfs() * prettyprint_ich9_reg_hsfc() Change-Id: I5d4fb012c6b9b843ac30c1fe2ea6fe754c545a43 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/43501 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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4c9b416379
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33
ichspi.c
33
ichspi.c
@ -389,13 +389,13 @@ static void prettyprint_opcodes(OPCODES *ops)
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#define _pprint_reg(bit, mask, off, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & mask) >> off)
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#define pprint_reg(reg, bit, val, sep) _pprint_reg(bit, reg##_##bit, reg##_##bit##_OFF, val, sep)
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static void prettyprint_ich9_reg_hsfs(uint16_t reg_val)
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static void prettyprint_ich9_reg_hsfs(uint16_t reg_val, enum ich_chipset ich_gen)
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{
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msg_pdbg("HSFS: ");
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pprint_reg(HSFS, FDONE, reg_val, ", ");
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pprint_reg(HSFS, FCERR, reg_val, ", ");
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pprint_reg(HSFS, AEL, reg_val, ", ");
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switch (ich_generation) {
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switch (ich_gen) {
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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@ -405,7 +405,7 @@ static void prettyprint_ich9_reg_hsfs(uint16_t reg_val)
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break;
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}
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pprint_reg(HSFS, SCIP, reg_val, ", ");
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switch (ich_generation) {
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switch (ich_gen) {
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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@ -420,11 +420,11 @@ static void prettyprint_ich9_reg_hsfs(uint16_t reg_val)
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pprint_reg(HSFS, FLOCKDN, reg_val, "\n");
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}
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static void prettyprint_ich9_reg_hsfc(uint16_t reg_val)
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static void prettyprint_ich9_reg_hsfc(uint16_t reg_val, enum ich_chipset ich_gen)
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{
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msg_pdbg("HSFC: ");
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pprint_reg(HSFC, FGO, reg_val, ", ");
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switch (ich_generation) {
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switch (ich_gen) {
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case CHIPSET_100_SERIES_SUNRISE_POINT:
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case CHIPSET_C620_SERIES_LEWISBURG:
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case CHIPSET_300_SERIES_CANNON_POINT:
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@ -1283,7 +1283,8 @@ static uint32_t ich_hwseq_get_erase_block_size(unsigned int addr)
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Returns 0 if the cycle completes successfully without errors within
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timeout us, 1 on errors. */
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static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout,
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unsigned int len)
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unsigned int len,
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enum ich_chipset ich_gen)
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{
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uint16_t hsfs;
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uint32_t addr;
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@ -1300,8 +1301,8 @@ static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout,
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msg_perr("Timeout error between offset 0x%08x and "
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"0x%08x (= 0x%08x + %d)!\n",
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addr, addr + len - 1, addr, len - 1);
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prettyprint_ich9_reg_hsfs(hsfs);
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prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC));
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prettyprint_ich9_reg_hsfs(hsfs, ich_gen);
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prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC), ich_gen);
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return 1;
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}
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@ -1310,8 +1311,8 @@ static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout,
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msg_perr("Transaction error between offset 0x%08x and "
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"0x%08x (= 0x%08x + %d)!\n",
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addr, addr + len - 1, addr, len - 1);
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prettyprint_ich9_reg_hsfs(hsfs);
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prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC));
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prettyprint_ich9_reg_hsfs(hsfs, ich_gen);
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prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC), ich_gen);
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return 1;
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}
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return 0;
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@ -1415,10 +1416,10 @@ static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr,
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hsfc |= (0x3 << HSFC_FCYCLE_OFF); /* set erase operation */
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hsfc |= HSFC_FGO; /* start */
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msg_pdbg("HSFC used for block erasing: ");
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prettyprint_ich9_reg_hsfc(hsfc);
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prettyprint_ich9_reg_hsfc(hsfc, ich_generation);
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REGWRITE16(ICH9_REG_HSFC, hsfc);
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if (ich_hwseq_wait_for_cycle_complete(timeout, len))
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if (ich_hwseq_wait_for_cycle_complete(timeout, len, ich_generation))
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return -1;
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return 0;
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}
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@ -1455,7 +1456,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
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hsfc |= HSFC_FGO; /* start */
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REGWRITE16(ICH9_REG_HSFC, hsfc);
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if (ich_hwseq_wait_for_cycle_complete(timeout, block_len))
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if (ich_hwseq_wait_for_cycle_complete(timeout, block_len, ich_generation))
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return 1;
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ich_read_data(buf, block_len, ICH9_REG_FDATA0);
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addr += block_len;
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@ -1497,7 +1498,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned
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hsfc |= HSFC_FGO; /* start */
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REGWRITE16(ICH9_REG_HSFC, hsfc);
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if (ich_hwseq_wait_for_cycle_complete(timeout, block_len))
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if (ich_hwseq_wait_for_cycle_complete(timeout, block_len, ich_generation))
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return -1;
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addr += block_len;
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buf += block_len;
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@ -1840,7 +1841,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
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tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
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msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
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prettyprint_ich9_reg_hsfs(tmp2);
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prettyprint_ich9_reg_hsfs(tmp2, ich_gen);
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if (tmp2 & HSFS_FLOCKDN) {
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msg_pinfo("SPI Configuration is locked down.\n");
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ichspi_lock = 1;
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@ -1856,7 +1857,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
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if (desc_valid) {
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tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC);
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msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2);
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prettyprint_ich9_reg_hsfc(tmp2);
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prettyprint_ich9_reg_hsfc(tmp2, ich_gen);
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}
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tmp = mmio_readl(ich_spibar + ICH9_REG_FADDR);
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