programmer: Smoothen register_par_master API

It was impossible to register a const struct par_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.

BUG=b:185191942
TEST=builds

Change-Id: I95bc92f6c54c5bcdac1c522ca87054aaffed0f40
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

atahpt.c

@@ -75,7 +75,7 @@ int atahpt_init(void)
 	reg32 |= (1 << 24);
 	rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
 
-	register_par_master(&par_master_atahpt, BUS_PARALLEL);
+	register_par_master(&par_master_atahpt, BUS_PARALLEL, NULL);
 
 	return 0;
 }

atapromise.c

@@ -140,7 +140,7 @@ int atapromise_init(void)
 	}
 
 	max_rom_decode.parallel = rom_size;
-	register_par_master(&par_master_atapromise, BUS_PARALLEL);
+	register_par_master(&par_master_atapromise, BUS_PARALLEL, NULL);
 
 	msg_pwarn("Do not use this device as a generic programmer. It will leave anything outside\n"
 		  "the first %zu kB of the flash chip in an undefined state. It works fine for the\n"

atavia.c

@@ -160,7 +160,7 @@ int atavia_init(void)
 		return 1;
 	}
 
-	register_par_master(&lpc_master_atavia, BUS_LPC);
+	register_par_master(&lpc_master_atavia, BUS_LPC, NULL);
 
 	return 0;
 }

drkaiser.c

@@ -77,7 +77,7 @@ int drkaiser_init(void)
 		return 1;
 
 	max_rom_decode.parallel = 128 * 1024;
-	register_par_master(&par_master_drkaiser, BUS_PARALLEL);
+	register_par_master(&par_master_drkaiser, BUS_PARALLEL, NULL);
 
 	return 0;
 }

dummyflasher.c

@@ -1027,7 +1027,8 @@ dummy_init_out:
 	}
 	if (dummy_buses_supported & BUS_NONSPI)
 		register_par_master(&par_master_dummy,
-				    dummy_buses_supported & BUS_NONSPI);
+				    dummy_buses_supported & BUS_NONSPI,
+				    NULL);
 	if (dummy_buses_supported & BUS_SPI)
 		register_spi_master(&spi_master_dummyflasher, data);
 

gfxnvidia.c

@@ -103,7 +103,7 @@ int gfxnvidia_init(void)
 
 	/* Write/erase doesn't work. */
 	programmer_may_write = 0;
-	register_par_master(&par_master_gfxnvidia, BUS_PARALLEL);
+	register_par_master(&par_master_gfxnvidia, BUS_PARALLEL, NULL);
 
 	return 0;
 }

internal.c

@@ -335,7 +335,7 @@ int internal_init(void)
 #endif /* IS_X86 */
 
 	if (internal_buses_supported & BUS_NONSPI)
-		register_par_master(&par_master_internal, internal_buses_supported);
+		register_par_master(&par_master_internal, internal_buses_supported, NULL);
 
 	/* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */
 	if (is_laptop && !laptop_ok) {

it8212.c

@@ -67,7 +67,7 @@ int it8212_init(void)
 	rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
 
 	max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
-	register_par_master(&par_master_it8212, BUS_PARALLEL);
+	register_par_master(&par_master_it8212, BUS_PARALLEL, NULL);
 	return 0;
 }
 

nic3com.c

@@ -120,7 +120,7 @@ int nic3com_init(void)
 		return 1;
 
 	max_rom_decode.parallel = 128 * 1024;
-	register_par_master(&par_master_nic3com, BUS_PARALLEL);
+	register_par_master(&par_master_nic3com, BUS_PARALLEL, NULL);
 
 	return 0;
 }

nicintel.c

@@ -99,7 +99,7 @@ int nicintel_init(void)
 	pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR);
 
 	max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE;
-	register_par_master(&par_master_nicintel, BUS_PARALLEL);
+	register_par_master(&par_master_nicintel, BUS_PARALLEL, NULL);
 
 	return 0;
 }

nicnatsemi.c

@@ -71,7 +71,7 @@ int nicnatsemi_init(void)
 	 * functions below wants to be 0x0000FFFF.
 	 */
 	max_rom_decode.parallel = 131072;
-	register_par_master(&par_master_nicnatsemi, BUS_PARALLEL);
+	register_par_master(&par_master_nicnatsemi, BUS_PARALLEL, NULL);
 
 	return 0;
 }

nicrealtek.c

@@ -86,7 +86,7 @@ int nicrealtek_init(void)
 	if (register_shutdown(nicrealtek_shutdown, NULL))
 		return 1;
 
-	register_par_master(&par_master_nicrealtek, BUS_PARALLEL);
+	register_par_master(&par_master_nicrealtek, BUS_PARALLEL, NULL);
 
 	return 0;
 }

programmer.c

@@ -81,7 +81,8 @@ void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf,
 }
 
 int register_par_master(const struct par_master *mst,
-			    const enum chipbustype buses)
+			    const enum chipbustype buses,
+			    void *data)
 {
 	struct registered_master rmst = {0};
 
@@ -96,6 +97,8 @@ int register_par_master(const struct par_master *mst,
 
 	rmst.buses_supported = buses;
 	rmst.par = *mst;
+	if (data)
+		rmst.par.data = data;
 	return register_master(&rmst);
 }
 

programmer.h

@@ -747,7 +747,7 @@ struct par_master {
 	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
 	void *data;
 };
-int register_par_master(const struct par_master *mst, const enum chipbustype buses);
+int register_par_master(const struct par_master *mst, const enum chipbustype buses, void *data);
 struct registered_master {
 	enum chipbustype buses_supported;
 	struct {

satamv.c

@@ -148,7 +148,7 @@ int satamv_init(void)
 	/* 512 kByte with two 8-bit latches, and
 	 * 4 MByte with additional 3-bit latch. */
 	max_rom_decode.parallel = 4 * 1024 * 1024;
-	register_par_master(&par_master_satamv, BUS_PARALLEL);
+	register_par_master(&par_master_satamv, BUS_PARALLEL, NULL);
 
 	return 0;
 }

satasii.c

@@ -100,7 +100,7 @@ int satasii_init(void)
 	if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
 		msg_pwarn("Warning: Flash seems unconnected.\n");
 
-	register_par_master(&par_master_satasii, BUS_PARALLEL);
+	register_par_master(&par_master_satasii, BUS_PARALLEL, NULL);
 
 	return 0;
 }

serprog.c

@@ -885,7 +885,7 @@ int serprog_init(void)
 	if (serprog_buses_supported & BUS_SPI)
 		register_spi_master(&spi_master_serprog, NULL);
 	if (serprog_buses_supported & BUS_NONSPI)
-		register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI);
+		register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI, NULL);
 	return 0;
 }