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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

Add AMD Hudson chipset-enable

AMD Hudson has different vendor/device IDs than AMD SBx00, handle
that properly.

Corresponding to flashrom svn r1422.

Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Wang Qing Pei 2011-08-26 21:11:41 +00:00 committed by Uwe Hermann
parent 09ebd52e01
commit 6e9e2ee2f4
2 changed files with 6 additions and 2 deletions

View File

@ -1058,6 +1058,7 @@ const struct penable chipset_enables[] = {
{0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520},
{0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111},
{0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111},
{0x1022, 0x780e, OK, "AMD", "Hudson", enable_flash_sb600},
{0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501},
{0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496},
{0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530},

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@ -259,8 +259,11 @@ int sb600_probe_spi(struct pci_dev *dev)
smbus_dev = pci_dev_find(0x1002, 0x4385); smbus_dev = pci_dev_find(0x1002, 0x4385);
if (!smbus_dev) { if (!smbus_dev) {
msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD Hudson */
return ERROR_NONFATAL; if (!smbus_dev) {
msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n");
return ERROR_NONFATAL;
}
} }
/* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */