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Add support for remaining Numonyx (Micron) N25Q chips
Add... - N25Q128..3E - N25Q128..1E - N25Q256..1E (defunct due to addressing) - N25Q256..3E (defunct due to addressing) - N25Q512..1E (defunct due to addressing) - N25Q512..3E (defunct due to addressing) - N25Q00A..3G (defunct due to addressing) Also, refine existing family members. Corresponding to flashrom svn r1693. Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com> Reviewed-by: Steven Zakulec <spzakulec@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:

committed by
Stefan Tauner

parent
c80c4a35a0
commit
6f59b0bc51
45
spi25.c
45
spi25.c
@ -473,6 +473,49 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
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return 0;
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}
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/* Block size is usually
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* 32M (one die) for Micron
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*/
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int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_C4_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_BE_C4,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 240-480 s, so wait in 500 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(500 * 1000 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Block size is usually
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* 64k for Macronix
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* 32k for SST
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@ -780,6 +823,8 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
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return &spi_block_erase_62;
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case 0x81:
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return &spi_block_erase_81;
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case 0xc4:
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return &spi_block_erase_c4;
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case 0xc7:
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return &spi_block_erase_c7;
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case 0xd7:
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