mirror of
https://review.coreboot.org/flashrom.git
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Add support for remaining Numonyx (Micron) N25Q chips
Add... - N25Q128..3E - N25Q128..1E - N25Q256..1E (defunct due to addressing) - N25Q256..3E (defunct due to addressing) - N25Q512..1E (defunct due to addressing) - N25Q512..3E (defunct due to addressing) - N25Q00A..3G (defunct due to addressing) Also, refine existing family members. Corresponding to flashrom svn r1693. Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com> Reviewed-by: Steven Zakulec <spzakulec@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Nikolay Nikolaev
Stefan Tauner
parent
c80c4a35a0
commit
6f59b0bc51
@ -48,6 +48,7 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int b
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int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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@ -91,6 +92,8 @@ int spi_disable_blockprotect_at25f512b(struct flashctx *flash);
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int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
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int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
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int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash);
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int spi_prettyprint_status_register_n25q(struct flashctx *flash);
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int spi_disable_blockprotect_n25q(struct flashctx *flash);
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int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash);
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int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25(struct flashctx *flash);
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263
flashchips.c
263
flashchips.c
@ -7308,8 +7308,9 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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@ -7341,8 +7342,9 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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@ -7374,8 +7376,9 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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@ -7407,8 +7410,9 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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@ -7440,9 +7444,246 @@ const struct flashchip flashchips[] = {
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
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.unlock = spi_disable_blockprotect,
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.write = spi_chip_write_256,
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q128..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q128__1E,
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.total_size = 16384,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 4096 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 256} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {16384 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q128..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q128__3E,
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.total_size = 16384,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 4096 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 256} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {16384 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q256..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q256__1E,
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.total_size = 32768,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_BAD_REW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 8192 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32768 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q256__3E,
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.total_size = 32768,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_BAD_REW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 8192 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 512} },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32768 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q512..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q512__1E,
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.total_size = 65536,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_BAD_REW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 16384 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 1024 } },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32 * 1024 * 1024, 2 } },
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.block_erase = spi_block_erase_c4,
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}, { /* Some models have a bulk erase command too. */
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.eraseblocks = { {64 * 1024 * 1024, 1 } },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {1700, 2000},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q512__3E,
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.total_size = 65536,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_BAD_REW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 16384 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 1024 } },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32 * 1024 * 1024, 2 } },
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.block_erase = spi_block_erase_c4,
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}, { /* Some models have a bulk erase command too. */
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.eraseblocks = { {64 * 1024 * 1024, 1} },
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.block_erase = spi_block_erase_c7,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Numonyx",
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.name = "N25Q00A..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */
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.bustype = BUS_SPI,
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.manufacture_id = ST_ID,
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.model_id = ST_N25Q00A__3E,
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.total_size = 131072,
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.page_size = 256,
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/* supports SFDP */
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/* OTP: 64B total; read 0x4B, write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_BAD_REW,
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.probe = probe_spi_rdid,
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.probe_timing = TIMING_ZERO,
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.block_erasers = {
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{
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.eraseblocks = { {4 * 1024, 32768 } },
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.block_erase = spi_block_erase_20,
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}, {
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.eraseblocks = { {64 * 1024, 2048 } },
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.block_erase = spi_block_erase_d8,
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}, {
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.eraseblocks = { {32 * 1024 * 1024, 4 } },
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.block_erase = spi_block_erase_c4,
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}
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},
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.printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
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.unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
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.write = spi_chip_write_256, /* Multi I/O supported */
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.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2700, 3600},
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},
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17
flashchips.h
17
flashchips.h
@ -663,11 +663,18 @@
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#define ST_M29W010B 0x23
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#define ST_M29W040B 0xE3
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#define ST_M29W512B 0x27
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#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */
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#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */
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#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */
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#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */
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#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */
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#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */
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#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */
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#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */
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#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */
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#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */
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#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */
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#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */
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#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */
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#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */
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#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */
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#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */
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#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */
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#define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
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#define MVC_V29C51000T 0x00
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5
spi.h
5
spi.h
@ -91,6 +91,11 @@
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#define JEDEC_BE_81_OUTSIZE 0x04
|
||||
#define JEDEC_BE_81_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xc4 is supported by Micron chips. */
|
||||
#define JEDEC_BE_C4 0xc4
|
||||
#define JEDEC_BE_C4_OUTSIZE 0x04
|
||||
#define JEDEC_BE_C4_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xd8 is supported by EON/Macronix chips. */
|
||||
#define JEDEC_BE_D8 0xd8
|
||||
#define JEDEC_BE_D8_OUTSIZE 0x04
|
||||
|
||||
45
spi25.c
45
spi25.c
@ -473,6 +473,49 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Block size is usually
|
||||
* 32M (one die) for Micron
|
||||
*/
|
||||
int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
|
||||
{
|
||||
int result;
|
||||
struct spi_command cmds[] = {
|
||||
{
|
||||
.writecnt = JEDEC_WREN_OUTSIZE,
|
||||
.writearr = (const unsigned char[]){ JEDEC_WREN },
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}, {
|
||||
.writecnt = JEDEC_BE_C4_OUTSIZE,
|
||||
.writearr = (const unsigned char[]){
|
||||
JEDEC_BE_C4,
|
||||
(addr >> 16) & 0xff,
|
||||
(addr >> 8) & 0xff,
|
||||
(addr & 0xff)
|
||||
},
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}, {
|
||||
.writecnt = 0,
|
||||
.writearr = NULL,
|
||||
.readcnt = 0,
|
||||
.readarr = NULL,
|
||||
}};
|
||||
|
||||
result = spi_send_multicommand(flash, cmds);
|
||||
if (result) {
|
||||
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
|
||||
return result;
|
||||
}
|
||||
/* Wait until the Write-In-Progress bit is cleared.
|
||||
* This usually takes 240-480 s, so wait in 500 ms steps.
|
||||
*/
|
||||
while (spi_read_status_register(flash) & SPI_SR_WIP)
|
||||
programmer_delay(500 * 1000 * 1000);
|
||||
/* FIXME: Check the status register for errors. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Block size is usually
|
||||
* 64k for Macronix
|
||||
* 32k for SST
|
||||
@ -780,6 +823,8 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
|
||||
return &spi_block_erase_62;
|
||||
case 0x81:
|
||||
return &spi_block_erase_81;
|
||||
case 0xc4:
|
||||
return &spi_block_erase_c4;
|
||||
case 0xc7:
|
||||
return &spi_block_erase_c7;
|
||||
case 0xd7:
|
||||
|
||||
@ -607,6 +607,28 @@ int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash)
|
||||
|
||||
/* === Intel/Numonyx/Micron - Spansion === */
|
||||
|
||||
int spi_disable_blockprotect_n25q(struct flashctx *flash)
|
||||
{
|
||||
return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF);
|
||||
}
|
||||
|
||||
int spi_prettyprint_status_register_n25q(struct flashctx *flash)
|
||||
{
|
||||
uint8_t status = spi_read_status_register(flash);
|
||||
spi_prettyprint_status_register_hex(status);
|
||||
|
||||
spi_prettyprint_status_register_srwd(status);
|
||||
if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */
|
||||
spi_prettyprint_status_register_bit(status, 6);
|
||||
else
|
||||
msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
|
||||
(status & (1 << 6)) ? "" : "not ");
|
||||
msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
|
||||
spi_prettyprint_status_register_bp(status, 2);
|
||||
spi_prettyprint_status_register_welwip(status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
|
||||
/* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */
|
||||
int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user