From 71b015f853da6df0b6772121fa2167a929cd02e0 Mon Sep 17 00:00:00 2001
From: Gerrit Code Review <root@gerrit>
Date: Tue, 18 May 2021 12:54:04 +0000
Subject: [PATCH] Update notes for submitted changes

* chipset_enable.c: Add Gemini Lake eSPI PCI device ID
---
 fb/c38c71589910876466fd385a1f64f1c0c40eb7 | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 fb/c38c71589910876466fd385a1f64f1c0c40eb7

diff --git a/fb/c38c71589910876466fd385a1f64f1c0c40eb7 b/fb/c38c71589910876466fd385a1f64f1c0c40eb7
new file mode 100644
index 000000000..afa08a726
--- /dev/null
+++ b/fb/c38c71589910876466fd385a1f64f1c0c40eb7
@@ -0,0 +1,8 @@
+Verified+1: build bot (Jenkins) <no-reply@coreboot.org>
+Code-Review+2: Edward O'Callaghan <quasisec@chromium.org>
+Code-Review+2: Sam McNally <sammc@google.com>
+Submitted-by: Edward O'Callaghan <quasisec@chromium.org>
+Submitted-at: Tue, 18 May 2021 12:54:04 +0000
+Reviewed-on: https://review.coreboot.org/c/flashrom/+/54354
+Project: flashrom
+Branch: refs/heads/master