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	Update notes for submitted changes
* chipset_enable.c: Add Intel pch7 did=0x1e4{1,2,3} support
			
			
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							| @@ -0,0 +1,8 @@ | |||||||
|  | Verified+1: build bot (Jenkins) <no-reply@coreboot.org> | ||||||
|  | Code-Review+2: Angel Pons <th3fanbus@gmail.com> | ||||||
|  | Code-Review+2: Sam McNally <sammc@google.com> | ||||||
|  | Submitted-by: Edward O'Callaghan <quasisec@chromium.org> | ||||||
|  | Submitted-at: Sat, 14 Nov 2020 03:27:15 +0000 | ||||||
|  | Reviewed-on: https://review.coreboot.org/c/flashrom/+/47090 | ||||||
|  | Project: flashrom | ||||||
|  | Branch: refs/heads/master | ||||||
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