mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 23:22:37 +02:00
Add nicnatsemi to print.c and print_wiki.c
Change the nicnatsemi address mask to use MA0-MA16 and set the maximum decode size to 128KB. Corresponding to flashrom svn r1095. Signed-off-by: Andrew Morgan <ziltro@ziltro.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
parent
86f4e6db2c
commit
74a828a6dd
12
nicnatsemi.c
12
nicnatsemi.c
@ -43,6 +43,14 @@ int nicnatsemi_init(void)
|
|||||||
|
|
||||||
buses_supported = CHIP_BUSTYPE_PARALLEL;
|
buses_supported = CHIP_BUSTYPE_PARALLEL;
|
||||||
|
|
||||||
|
/* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15
|
||||||
|
* in another. My NIC has MA16 connected to A16 on the boot ROM socket
|
||||||
|
* so I'm assuming it is accessible. If not then next line wants to be
|
||||||
|
* max_rom_decode.parallel = 65536; and the mask in the read/write
|
||||||
|
* functions below wants to be 0x0000FFFF.
|
||||||
|
*/
|
||||||
|
max_rom_decode.parallel = 131072;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -55,7 +63,7 @@ int nicnatsemi_shutdown(void)
|
|||||||
|
|
||||||
void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
|
void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
|
||||||
{
|
{
|
||||||
OUTL((uint32_t)addr & 0x0000FFFF, io_base_addr + BOOT_ROM_ADDR);
|
OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR);
|
||||||
/*
|
/*
|
||||||
* The datasheet requires 32 bit accesses to this register, but it seems
|
* The datasheet requires 32 bit accesses to this register, but it seems
|
||||||
* that requirement might only apply if the register is memory mapped.
|
* that requirement might only apply if the register is memory mapped.
|
||||||
@ -69,7 +77,7 @@ void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
|
|||||||
|
|
||||||
uint8_t nicnatsemi_chip_readb(const chipaddr addr)
|
uint8_t nicnatsemi_chip_readb(const chipaddr addr)
|
||||||
{
|
{
|
||||||
OUTL(((uint32_t)addr & 0x0000FFFF), io_base_addr + BOOT_ROM_ADDR);
|
OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR);
|
||||||
/*
|
/*
|
||||||
* The datasheet requires 32 bit accesses to this register, but it seems
|
* The datasheet requires 32 bit accesses to this register, but it seems
|
||||||
* that requirement might only apply if the register is memory mapped.
|
* that requirement might only apply if the register is memory mapped.
|
||||||
|
5
print.c
5
print.c
@ -228,7 +228,7 @@ void print_supported(void)
|
|||||||
print_supported_boards_helper(boards_known, "boards");
|
print_supported_boards_helper(boards_known, "boards");
|
||||||
print_supported_boards_helper(laptops_known, "laptops");
|
print_supported_boards_helper(laptops_known, "laptops");
|
||||||
#endif
|
#endif
|
||||||
#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1
|
#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1
|
||||||
printf("\nSupported PCI devices flashrom can use "
|
printf("\nSupported PCI devices flashrom can use "
|
||||||
"as programmer:\n\n");
|
"as programmer:\n\n");
|
||||||
#endif
|
#endif
|
||||||
@ -239,6 +239,9 @@ void print_supported(void)
|
|||||||
print_supported_pcidevs(nics_realtek);
|
print_supported_pcidevs(nics_realtek);
|
||||||
print_supported_pcidevs(nics_realteksmc1211);
|
print_supported_pcidevs(nics_realteksmc1211);
|
||||||
#endif
|
#endif
|
||||||
|
#if CONFIG_NICNATSEMI == 1
|
||||||
|
print_supported_pcidevs(nics_natsemi);
|
||||||
|
#endif
|
||||||
#if CONFIG_GFXNVIDIA == 1
|
#if CONFIG_GFXNVIDIA == 1
|
||||||
print_supported_pcidevs(gfx_nvidia);
|
print_supported_pcidevs(gfx_nvidia);
|
||||||
#endif
|
#endif
|
||||||
|
@ -280,6 +280,9 @@ void print_supported_wiki(void)
|
|||||||
print_supported_pcidevs_wiki(nics_realtek);
|
print_supported_pcidevs_wiki(nics_realtek);
|
||||||
print_supported_pcidevs_wiki(nics_realteksmc1211);
|
print_supported_pcidevs_wiki(nics_realteksmc1211);
|
||||||
#endif
|
#endif
|
||||||
|
#if CONFIG_NICNATSEMI == 1
|
||||||
|
print_supported_pcidevs_wiki(nics_natsemi);
|
||||||
|
#endif
|
||||||
#if CONFIG_GFXNVIDIA == 1
|
#if CONFIG_GFXNVIDIA == 1
|
||||||
print_supported_pcidevs_wiki(gfx_nvidia);
|
print_supported_pcidevs_wiki(gfx_nvidia);
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
x
Reference in New Issue
Block a user