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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 06:01:16 +02:00

tree/: Move programmer_delay() out of programmer state machine

Handle the special cases of both serprog and ch341a_spi.
Also rewrite programmer_delay() to handle the two base
cases of zero time and no valid flashctx yet before
handling per master branching.

Additionally, modify the custom delay function pointer
signature to allow closure over the flashctx. This allows
driver specific delay implementations to recover programmer
specific opaque data within their delay implementations.
Therefore programmer specific delay functions can avoid
programmer specific globals.

Change-Id: Id059abb58b31a066a408009073912da2b224d40c
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Edward O'Callaghan
2022-09-07 12:51:16 +10:00
committed by Edward O'Callaghan
parent 048aab6d66
commit 78e421bdf7
4 changed files with 43 additions and 31 deletions

View File

@ -322,7 +322,7 @@ static void pluck_cs(uint8_t *ptr)
*ptr++ = CH341A_CMD_UIO_STM_END;
}
static void ch341a_spi_delay(unsigned int usecs)
static void ch341a_spi_delay(const struct flashctx *flash, unsigned int usecs)
{
/* There is space for 28 bytes instructions of 750 ns each in the CS packet (32 - 4 for the actual CS
* instructions), thus max 21 us, but we avoid getting too near to this boundary and use
@ -419,6 +419,7 @@ static const struct spi_master spi_master_ch341a_spi = {
.write_aai = default_spi_write_aai,
.shutdown = ch341a_spi_shutdown,
.probe_opcode = default_spi_probe_opcode,
.delay = ch341a_spi_delay,
};
static int ch341a_spi_init(const struct programmer_cfg *cfg)
@ -525,5 +526,4 @@ const struct programmer_entry programmer_ch341a_spi = {
.type = USB,
.devs.dev = devs_ch341a_spi,
.init = ch341a_spi_init,
.delay = ch341a_spi_delay,
};