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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 14:11:15 +02:00

support 4-byte address format for VARIABLE_SIZE dummy flash device

This patch adds a support of 4-byte address format for VARIABLE_SIZE
dummy flash device, so that it can emulate an flash size larger than
16 MBytes.
- assigned a feature bits FEATURE_4BA to VARIABLE_SIZE flash config.
- added codes handling two commands, JEDEC_READ_4BA and
JEDEC_BYTE_PROGRAM_4BA.
- changed blockeraser to use Chip-Erase command so that it can be
free from flash address byte format.

TEST=ran the command line below:
$ flashrom -p dummy:image=${TMP_FILE},size=33554432, \
emulate=VARIABLE_SIZE -w ${IMG_32MB} -V -f

$ flashrom -p dummy:image=${TMP_FILE},size=16777216, \
emulate=VARIABLE_SIZE -w ${IMG_16MB} -V -f

$ flashrom -p dummy:image=${TMP_FILE},size=8388608, \
emulate=VARIABLE_SIZE -w ${IMG_8MB} -V -f

Signed-off-by: Namyoon Woo <namyoon@google.com>
Change-Id: Ia59eecfcbe798d50f8dacea98c3c508edf8ec77e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/44881
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Namyoon Woo
2020-08-27 16:27:49 -07:00
committed by Edward O'Callaghan
parent 84fc9e889d
commit 79da18f869
2 changed files with 26 additions and 3 deletions

View File

@ -18765,13 +18765,14 @@ const struct flashchip flashchips[] = {
.model_id = PROGDEV_ID,
.total_size = 64, /* This size is set temporarily */
.page_size = 256,
.feature_bits = FEATURE_4BA,
.tested = TEST_OK_PREW,
.probe = probe_variable_size,
.block_erasers =
{
{
.eraseblocks = { {64 * 1024, 1} },
.block_erase = spi_block_erase_d8,
.block_erase = spi_block_erase_c7,
}
},
.write = spi_chip_write_256,