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ichspi: Add support for Meteor Lake

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This patch adds Meteor Lake support into flashrom.

Additionally, utilize CSSO (CPU Soft Strap Offset) to uniquely detect
the chipset when the CSSL (CPU Soft Strap Length) field default value
(0x03) on Meteor Lake is the same as Elkhart Lake.

BUG=b:224325352
TEST=Flashrom is able to detect MTL SPI DID and show chipset name as below:
> flashrom --flash-name
....
Found chipset "Intel Meteor Lake-P/M".
....

> flashrom - internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Reading ich_descriptor... done.
Assuming chipset 'Meteor Lake'.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0a2ffe2ba8d96c90d89b77e0d8583d179ff02a75
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Sam McNally <sammc@google.com>
This commit is contained in:
Subrata Banik
2022-03-14 14:17:32 +05:30
committed by Edward O'Callaghan
parent 1b66464269
commit 7dcd0deafe
5 changed files with 38 additions and 6 deletions
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3
util/ich_descriptors_tool/ich_descriptors_tool.c
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@ -128,6 +128,7 @@ static void usage(char *argv[], const char *error)
"\t- \"silvermont\" for chipsets from Intel's Silvermont architecture (e.g. Bay Trail),\n"
"\t- \"apollo\" for Intel's Apollo Lake SoC.\n"
"\t- \"gemini\" for Intel's Gemini Lake SoC.\n"
"\t- \"meteor\" for Intel's Meteor Lake SoC.\n"
"\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n"
"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
@ -243,6 +244,8 @@ int main(int argc, char *argv[])
cs = CHIPSET_GEMINI_LAKE;
else if (strcmp(csn, "elkhart") == 0)
cs = CHIPSET_ELKHART_LAKE;
else if (strcmp(csn, "meteor") == 0)
cs = CHIPSET_METEOR_LAKE;
}
ret = read_ich_descriptors_from_dump(buf, len, &cs, &desc);