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programmer: Smoothen register_spi_master() API

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It was impossible to register a const struct spi_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.

Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Nico Huber
2021-05-11 17:38:14 +02:00
parent c117378478
commit 7e4968525d
27 changed files with 33 additions and 31 deletions
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6
ichspi.c
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@ -1812,7 +1812,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
}
ich_init_opcodes(ich_gen);
ich_set_bbar(0, ich_gen);
register_spi_master(&spi_master_ich7);
register_spi_master(&spi_master_ich7, NULL);
break;
case CHIPSET_ICH8:
default: /* Future version might behave the same */
@ -2041,7 +2041,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
register_opaque_master(&opaque_master_ich_hwseq);
} else {
register_spi_master(&spi_master_ich9);
register_spi_master(&spi_master_ich9, NULL);
}
break;
}
@ -2071,7 +2071,7 @@ int via_init_spi(uint32_t mmio_base)
/* Not sure if it speaks all these bus protocols. */
internal_buses_supported &= BUS_LPC | BUS_FWH;
ich_generation = CHIPSET_ICH7;
register_spi_master(&spi_master_via);
register_spi_master(&spi_master_via, NULL);
msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0));
msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2));