openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 22:43:17 +02:00
Code Issues Releases Wiki Activity

dediprog: Implement 4BA EAR mode for protocol v1

Browse Source 
With an SF100 and protocol version 1, using the extended address
register of the flash chip seems safe. Make use of that and remove
the broken 4BA modes flag.

Tested with SF100 V:5.1.9 and W25Q256FV.

Change-Id: If926cf3cbbebf88231116c4d65bafc19d23646f6
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/32016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber
2019-03-21 15:42:54 +01:00
committed by David Hendricks
parent 17890b37f3
commit 7eb38aa7db
3 changed files with 26 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
chipdrivers.h
View File

@ -58,6 +58,7 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, u
int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
int spi_enter_4ba(struct flashctx *flash);
int spi_exit_4ba(struct flashctx *flash);
int spi_set_extended_address(struct flashctx *, uint8_t addr_high);
/* spi25_statusreg.c */