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flashchips.c: remove WREN from GD25Q256D enter 4BA sequence

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As noted in a comment on
`commit 86fc9cf7ab221bc54ef6f10252e296fc2d7a22d2`, the GD25Q256D
datasheet indicates that the chip does not require a WREN command to
enter 4BA mode.

Testing has confirmed that a WREN command is not required, so change the
flashchip feature flags from FEATURE_4BA_WREN to FEATURE_4BA.

Ticket: https://ticket.coreboot.org/issues/356

BUG=none
BRANCH=none
TEST=read/write/erase/verify GD25Q256D flash with FT2232H programmer
TEST=called spi_enter_exit_4ba(true), dumped registers, checked ADS=1.

Change-Id: I96e48933f33c52c0d10a0d4cb7f7e07c1fceab99
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Nikolai Artemiev 2022-12-05 13:06:14 +11:00 committed by Anastasia Klimchuk
parent 153359935a
commit 7f3c3f5c48
1 changed files with 1 additions and 1 deletions
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flashchips.c
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@ -6849,7 +6849,7 @@ const struct flashchip flashchips[] = {
.model_id = GIGADEVICE_GD25Q256D,
.total_size = 32768,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN |
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA |
FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,