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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 06:23:18 +02:00

Various IT85* cleanups and fixes

Fix a few typos.
Change the EC memory region mapping name.
Drop unused function parameter.
Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory
locations instead of plain pointer access which is optimized away by gcc.
Use own it85_* SPI high-level chip read/write functions instead of
relying on unrelated ICH functions.

Corresponding to flashrom svn r1279.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

David writes:
I applied the patch against the Chromium OS branch and
successfully tested read and write operations on a Cr48.

Acked-by: David Hendricks <dhendrix@google.com>
This commit is contained in:
Carl-Daniel Hailfinger
2011-03-08 00:23:49 +00:00
parent d95355880a
commit 7f517a7103
3 changed files with 32 additions and 19 deletions

View File

@ -585,9 +585,11 @@ int ich_spi_send_multicommand(struct spi_command *cmds);
struct superio probe_superio_ite85xx(void);
int it85xx_spi_init(void);
int it85xx_shutdown(void);
int it85xx_probe_spi_flash(const char *name);
int it85xx_probe_spi_flash(void);
int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len);
int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len);
/* it87spi.c */
void enter_conf_mode_ite(uint16_t port);