From 83f2693f3865235e8fc1906a6b9e9a28da110f4a Mon Sep 17 00:00:00 2001
From: Gerrit Code Review <root@gerrit>
Date: Thu, 11 Mar 2021 23:25:04 +0000
Subject: [PATCH] Update notes for submitted changes

* chipset_enable.c: Add PCI ID for Comet Lake U Base
---
 80/591575f7abedcf13f05f39af621404bfe96e08 | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 80/591575f7abedcf13f05f39af621404bfe96e08

diff --git a/80/591575f7abedcf13f05f39af621404bfe96e08 b/80/591575f7abedcf13f05f39af621404bfe96e08
new file mode 100644
index 000000000..a58727ba3
--- /dev/null
+++ b/80/591575f7abedcf13f05f39af621404bfe96e08
@@ -0,0 +1,8 @@
+Verified+1: build bot (Jenkins) <no-reply@coreboot.org>
+Code-Review+2: Angel Pons <th3fanbus@gmail.com>
+Code-Review+2: Edward O'Callaghan <quasisec@chromium.org>
+Submitted-by: Edward O'Callaghan <quasisec@chromium.org>
+Submitted-at: Thu, 11 Mar 2021 23:25:04 +0000
+Reviewed-on: https://review.coreboot.org/c/flashrom/+/51401
+Project: flashrom
+Branch: refs/heads/master