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ichspi.c: Add support for region 9 and beyond in Meteor Lake

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Since Meteor Lake, configuring region access for FREG9 and higher is
necessary. This configuration is determined using BIOS_BM registers:

BIOS_BM_RAP (Offset 0x118): BIOS Master Read Access Permissions.
Each bit [15:0] corresponds to a region [15:0].
A set bit grants BIOS master read access.

BIOS_BM_WAP (Offset 0x11c): BIOS Master Write Access Permissions.
Each bit [15:0] corresponds to a region [15:0].
A set bit grants BIOS master write/erase access.

Move CHIPSET_METEOR_LAKE to the bottom of the ich_chipset list to ensure
that all the newer chipsets in the future will use BIOS_BM check by
default.

BUG=b:319773700, b:304439294
BUG=b:319336080
TEST=On MTL, use flashrom -VV to see correct FREG9 access
TEST=On ADL, use flashrom -VV to see not break anything
TEST=On APL, use flashrom -VV to see not break anything

Change-Id: I1e06e7b3d470423a6014e623826d9234fdebfbf9
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/81357
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
roccochen@chromium.com
2024-02-22 18:29:29 +08:00
committed by Anastasia Klimchuk
parent 3b3e25f1ca
commit 85b977151b
2 changed files with 67 additions and 20 deletions
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3
include/programmer.h
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@ -357,11 +357,12 @@ enum ich_chipset {
CHIPSET_400_SERIES_COMET_POINT,
CHIPSET_500_SERIES_TIGER_POINT,
CHIPSET_600_SERIES_ALDER_POINT,
CHIPSET_METEOR_LAKE,
CHIPSET_APOLLO_LAKE,
CHIPSET_GEMINI_LAKE,
CHIPSET_JASPER_LAKE,
CHIPSET_ELKHART_LAKE,
/* All chipsets after METEOR_LAKE should support checking BIOS_BM to get read/write access to of FREG0~15 */
CHIPSET_METEOR_LAKE,
};
/* ichspi.c */