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Code Issues Releases Wiki Activity

Enable 4BA mode for Spansion 25FL256S

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4BA mode is entered by setting bit 7 for the extended address register.

Change-Id: I807bf55d65763a9f48a6a3377f14f4e5288a7a4c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Tested-by: Michael Fuckner <michael@fuckner.net>
Reviewed-on: https://review.coreboot.org/25133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber
2018-03-13 18:14:52 +01:00
parent 57dbd64b33
commit 86bddb5d52
4 changed files with 12 additions and 8 deletions
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2
flashchips.c
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@ -12524,7 +12524,7 @@ const struct flashchip flashchips[] = {
.total_size = 32768,
.page_size = 256,
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EXT_ADDR,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_EAR7,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,