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Enable 4BA mode for Spansion 25FL256S

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4BA mode is entered by setting bit 7 for the extended address register.

Change-Id: I807bf55d65763a9f48a6a3377f14f4e5288a7a4c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Tested-by: Michael Fuckner <michael@fuckner.net>
Reviewed-on: https://review.coreboot.org/25133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber 2018-03-13 18:14:52 +01:00
parent 57dbd64b33
commit 86bddb5d52
4 changed files with 12 additions and 8 deletions
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14
flash.h
View File

@ -117,21 +117,23 @@ enum write_granularity {
#define FEATURE_QPI (1 << 9) #define FEATURE_QPI (1 << 9)
#define FEATURE_4BA_ENTER (1 << 10) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN */ #define FEATURE_4BA_ENTER (1 << 10) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN */
#define FEATURE_4BA_ENTER_WREN (1 << 11) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN */ #define FEATURE_4BA_ENTER_WREN (1 << 11) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN */
#define FEATURE_4BA_EXT_ADDR (1 << 12) /**< Regular 3-byte operations can be used by writing the most #define FEATURE_4BA_ENTER_EAR7 (1 << 12) /**< Can enter/exit 4BA mode by setting bit7 of the ext addr reg */
#define FEATURE_4BA_EXT_ADDR (1 << 13) /**< Regular 3-byte operations can be used by writing the most
significant address byte into an extended address register. */ significant address byte into an extended address register. */
#define FEATURE_4BA_READ (1 << 13) /**< Native 4BA read instruction (0x13) is supported. */ #define FEATURE_4BA_READ (1 << 14) /**< Native 4BA read instruction (0x13) is supported. */
#define FEATURE_4BA_FAST_READ (1 << 14) /**< Native 4BA fast read instruction (0x0c) is supported. */ #define FEATURE_4BA_FAST_READ (1 << 15) /**< Native 4BA fast read instruction (0x0c) is supported. */
#define FEATURE_4BA_WRITE (1 << 15) /**< Native 4BA byte program (0x12) is supported. */ #define FEATURE_4BA_WRITE (1 << 16) /**< Native 4BA byte program (0x12) is supported. */
/* 4BA Shorthands */ /* 4BA Shorthands */
#define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE) #define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE)
#define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) #define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
#define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) #define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
#define FEATURE_4BA_EAR7 (FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
/* /*
* Most flash chips are erased to ones and programmed to zeros. However, some * Most flash chips are erased to ones and programmed to zeros. However, some
* other flash chips, such as the ENE KB9012 internal flash, work the opposite way. * other flash chips, such as the ENE KB9012 internal flash, work the opposite way.
*/ */
#define FEATURE_ERASED_ZERO (1 << 16) #define FEATURE_ERASED_ZERO (1 << 17)
#define FEATURE_NO_ERASE (1 << 17) #define FEATURE_NO_ERASE (1 << 18)
#define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff)

2
flashchips.c
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@ -12524,7 +12524,7 @@ const struct flashchip flashchips[] = {
.total_size = 32768, .total_size = 32768,
.page_size = 256, .page_size = 256,
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EXT_ADDR, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_EAR7,
.tested = TEST_OK_PREW, .tested = TEST_OK_PREW,
.probe = probe_spi_rdid, .probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO, .probe_timing = TIMING_ZERO,

2
flashrom.c
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@ -2260,7 +2260,7 @@ int prepare_flash_access(struct flashctx *const flash,
flash->in_4ba_mode = false; flash->in_4ba_mode = false;
/* Enable/disable 4-byte addressing mode if flash chip supports it */ /* Enable/disable 4-byte addressing mode if flash chip supports it */
if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN)) { if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7)) {
int ret; int ret;
if (spi_master_4ba(flash)) if (spi_master_4ba(flash))
ret = spi_enter_4ba(flash); ret = spi_enter_4ba(flash);

2
spi25.c
View File

@ -849,6 +849,8 @@ static int spi_enter_exit_4ba(struct flashctx *const flash, const bool enter)
ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL);
else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_WREN) else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_WREN)
ret = spi_simple_write_cmd(flash, cmd, 0); ret = spi_simple_write_cmd(flash, cmd, 0);
else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_EAR7)
ret = spi_set_extended_address(flash, enter ? 0x80 : 0x00);
if (!ret) if (!ret)
flash->in_4ba_mode = enter; flash->in_4ba_mode = enter;