mirror of
https://review.coreboot.org/flashrom.git
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Introduce an include directory for header files
Move all header files to the new `include` directory. Adapt include directives and build systems to the new directory. Change-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf Signed-off-by: Felix Singer <felix.singer@secunet.com> Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Thomas Heijligen
committed by
Anastasia Klimchuk
Anastasia Klimchuk
parent
bfbec45de0
commit
87d7b110d6
220
include/chipdrivers.h
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220
include/chipdrivers.h
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@ -0,0 +1,220 @@
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/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Header file for flash chip drivers. Included from flash.h.
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* As a general rule, every function listed here should take a pointer to
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* struct flashctx as first parameter.
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*/
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#ifndef __CHIPDRIVERS_H__
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#define __CHIPDRIVERS_H__ 1
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#include "flash.h" /* for chipaddr and flashctx */
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/* spi.c */
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int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
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/* spi25.c */
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int probe_spi_rdid(struct flashctx *flash);
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int probe_spi_rdid4(struct flashctx *flash);
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int probe_spi_rems(struct flashctx *flash);
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int probe_spi_res1(struct flashctx *flash);
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int probe_spi_res2(struct flashctx *flash);
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int probe_spi_res3(struct flashctx *flash);
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int probe_spi_at25f(struct flashctx *flash);
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int spi_write_enable(struct flashctx *flash);
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int spi_write_disable(struct flashctx *flash);
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int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
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int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
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int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
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int spi_enter_4ba(struct flashctx *flash);
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int spi_exit_4ba(struct flashctx *flash);
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int spi_set_extended_address(struct flashctx *, uint8_t addr_high);
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/* spi25_statusreg.c */
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int spi_read_register(const struct flashctx *flash, enum flash_reg reg, uint8_t *value);
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int spi_write_register(const struct flashctx *flash, enum flash_reg reg, uint8_t value);
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void spi_prettyprint_status_register_bit(uint8_t status, int bit);
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int spi_prettyprint_status_register_plain(struct flashctx *flash);
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int spi_prettyprint_status_register_default_welwip(struct flashctx *flash);
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int spi_prettyprint_status_register_bp1_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_bp2_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_bp3_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash);
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int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash);
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int spi_disable_blockprotect(struct flashctx *flash);
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int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash);
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int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash);
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int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash);
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int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash);
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int spi_prettyprint_status_register_at25df(struct flashctx *flash);
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int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
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int spi_prettyprint_status_register_at25f(struct flashctx *flash);
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int spi_prettyprint_status_register_at25f512a(struct flashctx *flash);
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int spi_prettyprint_status_register_at25f512b(struct flashctx *flash);
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int spi_prettyprint_status_register_at25f4096(struct flashctx *flash);
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int spi_prettyprint_status_register_at25fs010(struct flashctx *flash);
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int spi_prettyprint_status_register_at25fs040(struct flashctx *flash);
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int spi_prettyprint_status_register_at26df081a(struct flashctx *flash);
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int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash);
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int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash);
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int spi_disable_blockprotect_at25f(struct flashctx *flash);
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int spi_disable_blockprotect_at25f512a(struct flashctx *flash);
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int spi_disable_blockprotect_at25f512b(struct flashctx *flash);
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int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
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int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
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int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash);
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int spi_prettyprint_status_register_n25q(struct flashctx *flash);
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int spi_disable_blockprotect_n25q(struct flashctx *flash);
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int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash);
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int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash);
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int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash);
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int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash);
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/* sfdp.c */
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int probe_spi_sfdp(struct flashctx *flash);
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/* opaque.c */
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int probe_opaque(struct flashctx *flash);
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int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
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int write_opaque(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
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/* at45db.c */
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int probe_spi_at45db(struct flashctx *flash);
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int spi_prettyprint_status_register_at45db(struct flashctx *flash);
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int spi_disable_blockprotect_at45db(struct flashctx *flash);
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int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
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int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
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int spi_write_at45db(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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/* 82802ab.c */
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uint8_t wait_82802ab(struct flashctx *flash);
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int probe_82802ab(struct flashctx *flash);
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int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize);
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int write_82802ab(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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void print_status_82802ab(uint8_t status);
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int unlock_28f004s5(struct flashctx *flash);
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int unlock_lh28f008bjt(struct flashctx *flash);
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/* jedec.c */
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uint8_t oddparity(uint8_t val);
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void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst);
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void data_polling_jedec(const struct flashctx *flash, chipaddr dst, uint8_t data);
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int probe_jedec(struct flashctx *flash);
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int probe_jedec_29gl(struct flashctx *flash);
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int write_jedec(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int write_jedec_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int pagesize);
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int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
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int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
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int unlock_regspace2_uniform_32k(struct flashctx *flash);
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int unlock_regspace2_uniform_64k(struct flashctx *flash);
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int unlock_regspace2_block_eraser_0(struct flashctx *flash);
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int unlock_regspace2_block_eraser_1(struct flashctx *flash);
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int printlock_regspace2_uniform_64k(struct flashctx *flash);
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int printlock_regspace2_block_eraser_0(struct flashctx *flash);
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int printlock_regspace2_block_eraser_1(struct flashctx *flash);
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/* sst28sf040.c */
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int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size);
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int write_28sf040(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int unprotect_28sf040(struct flashctx *flash);
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int protect_28sf040(struct flashctx *flash);
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/* sst49lfxxxc.c */
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int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size);
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/* sst_fwhub.c */
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int printlock_sst_fwhub(struct flashctx *flash);
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int unlock_sst_fwhub(struct flashctx *flash);
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/* s25f.c */
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int probe_spi_big_spansion(struct flashctx *flash);
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int s25fl_block_erase(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int s25fs_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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/* w39.c */
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int printlock_w39f010(struct flashctx * flash);
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int printlock_w39l010(struct flashctx * flash);
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int printlock_w39l020(struct flashctx * flash);
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int printlock_w39l040(struct flashctx * flash);
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int printlock_w39v040a(struct flashctx *flash);
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int printlock_w39v040b(struct flashctx *flash);
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int printlock_w39v040c(struct flashctx *flash);
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int printlock_w39v040fa(struct flashctx *flash);
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int printlock_w39v040fb(struct flashctx *flash);
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int printlock_w39v040fc(struct flashctx *flash);
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int printlock_w39v080a(struct flashctx *flash);
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int printlock_w39v080fa(struct flashctx *flash);
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int printlock_w39v080fa_dual(struct flashctx *flash);
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int printlock_at49f(struct flashctx *flash);
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/* w29ee011.c */
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int probe_w29ee011(struct flashctx *flash);
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/* stm50.c */
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int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize);
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/* en29lv640b.c */
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int probe_en29lv640b(struct flashctx *flash);
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int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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/* dummyflasher.c */
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int probe_variable_size(struct flashctx *flash);
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/* edi.c */
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int edi_chip_block_erase(struct flashctx *flash, unsigned int page, unsigned int size);
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int edi_chip_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
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int edi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
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int edi_probe_kb9012(struct flashctx *flash);
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/* spi95.c */
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int probe_spi_st95(struct flashctx *flash);
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int spi_block_erase_emulation(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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/* writeprotect_ranges.c */
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void decode_range_spi25(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
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#endif /* !__CHIPDRIVERS_H__ */
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146
include/coreboot_tables.h
Normal file
146
include/coreboot_tables.h
Normal file
@ -0,0 +1,146 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2002 Linux Networx
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* (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
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* Copyright (C) 2005-2007 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; version 2 of the License.
|
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*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*/
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|
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#ifndef COREBOOT_TABLES_H
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#define COREBOOT_TABLES_H
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#include <stdint.h>
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|
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/* The coreboot table information is for conveying information
|
||||
* from the firmware to the loaded OS image. Primarily this
|
||||
* is expected to be information that cannot be discovered by
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* other means, such as querying the hardware directly.
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*
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||||
* All of the information should be Position Independent Data.
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* That is it should be safe to relocated any of the information
|
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* without it's meaning/correctness changing. For table that
|
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* can reasonably be used on multiple architectures the data
|
||||
* size should be fixed. This should ease the transition between
|
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* 32 bit and 64 bit architectures etc.
|
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*
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||||
* The completeness test for the information in this table is:
|
||||
* - Can all of the hardware be detected?
|
||||
* - Are the per motherboard constants available?
|
||||
* - Is there enough to allow a kernel to run that was written before
|
||||
* a particular motherboard is constructed? (Assuming the kernel
|
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* has drivers for all of the hardware but it does not have
|
||||
* assumptions on how the hardware is connected together).
|
||||
*
|
||||
* With this test it should be straight forward to determine if a
|
||||
* table entry is required or not. This should remove much of the
|
||||
* long term compatibility burden as table entries which are
|
||||
* irrelevant or have been replaced by better alternatives may be
|
||||
* dropped. Of course it is polite and expedite to include extra
|
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* table entries and be backwards compatible, but it is not required.
|
||||
*/
|
||||
|
||||
/* Since coreboot is usually compiled 32bit, gcc will align 64bit
|
||||
* types to 32bit boundaries. If the coreboot table is dumped on a
|
||||
* 64bit system, a uint64_t would be aligned to 64bit boundaries,
|
||||
* breaking the table format.
|
||||
*
|
||||
* lb_uint64 will keep 64bit coreboot table values aligned to 32bit
|
||||
* to ensure compatibility. They can be accessed with the two functions
|
||||
* below: unpack_lb64() and pack_lb64()
|
||||
*
|
||||
* See also: util/lbtdump/lbtdump.c
|
||||
*/
|
||||
|
||||
struct lb_uint64 {
|
||||
uint32_t lo;
|
||||
uint32_t hi;
|
||||
};
|
||||
|
||||
struct lb_header {
|
||||
uint8_t signature[4]; /* LBIO */
|
||||
uint32_t header_bytes;
|
||||
uint32_t header_checksum;
|
||||
uint32_t table_bytes;
|
||||
uint32_t table_checksum;
|
||||
uint32_t table_entries;
|
||||
};
|
||||
|
||||
/* Every entry in the boot environment list will correspond to a boot
|
||||
* info record. Encoding both type and size. The type is obviously
|
||||
* so you can tell what it is. The size allows you to skip that
|
||||
* boot environment record if you don't know what it easy. This allows
|
||||
* forward compatibility with records not yet defined.
|
||||
*/
|
||||
struct lb_record {
|
||||
uint32_t tag; /* tag ID */
|
||||
uint32_t size; /* size of record (in bytes) */
|
||||
};
|
||||
|
||||
#define LB_TAG_UNUSED 0x0000
|
||||
|
||||
#define LB_TAG_MEMORY 0x0001
|
||||
|
||||
struct lb_memory_range {
|
||||
struct lb_uint64 start;
|
||||
struct lb_uint64 size;
|
||||
uint32_t type;
|
||||
#define LB_MEM_RAM 1 /* Memory anyone can use */
|
||||
#define LB_MEM_RESERVED 2 /* Don't use this memory region */
|
||||
#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
|
||||
};
|
||||
|
||||
struct lb_memory {
|
||||
uint32_t tag;
|
||||
uint32_t size;
|
||||
struct lb_memory_range map[0];
|
||||
};
|
||||
|
||||
#define LB_TAG_HWRPB 0x0002
|
||||
struct lb_hwrpb {
|
||||
uint32_t tag;
|
||||
uint32_t size;
|
||||
uint64_t hwrpb;
|
||||
};
|
||||
|
||||
#define LB_TAG_MAINBOARD 0x0003
|
||||
struct lb_mainboard {
|
||||
uint32_t tag;
|
||||
uint32_t size;
|
||||
uint8_t vendor_idx;
|
||||
uint8_t part_number_idx;
|
||||
uint8_t strings[0];
|
||||
};
|
||||
|
||||
#define LB_TAG_VERSION 0x0004
|
||||
#define LB_TAG_EXTRA_VERSION 0x0005
|
||||
#define LB_TAG_BUILD 0x0006
|
||||
#define LB_TAG_COMPILE_TIME 0x0007
|
||||
#define LB_TAG_COMPILE_BY 0x0008
|
||||
#define LB_TAG_COMPILE_HOST 0x0009
|
||||
#define LB_TAG_COMPILE_DOMAIN 0x000a
|
||||
#define LB_TAG_COMPILER 0x000b
|
||||
#define LB_TAG_LINKER 0x000c
|
||||
#define LB_TAG_ASSEMBLER 0x000d
|
||||
struct lb_string {
|
||||
uint32_t tag;
|
||||
uint32_t size;
|
||||
uint8_t string[0];
|
||||
};
|
||||
|
||||
#define LB_TAG_FORWARD 0x0011
|
||||
struct lb_forward {
|
||||
uint32_t tag;
|
||||
uint32_t size;
|
||||
uint64_t forward;
|
||||
};
|
||||
|
||||
#endif /* COREBOOT_TABLES_H */
|
||||
31
include/custom_baud.h
Normal file
31
include/custom_baud.h
Normal file
@ -0,0 +1,31 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2017 Urja Rannikko <urjaman@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CUSTOM_BAUD_H__
|
||||
#define __CUSTOM_BAUD_H__ 1
|
||||
|
||||
struct baudentry {
|
||||
int flag;
|
||||
unsigned int baud;
|
||||
};
|
||||
|
||||
int set_custom_baudrate(int fd, unsigned int baud);
|
||||
|
||||
/* Returns 1 if non-exact rate would be used, and setting a custom rate is supported.
|
||||
The baudtable must be in ascending order and terminated with a 0-baud entry. */
|
||||
int use_custom_baud(unsigned int baud, const struct baudentry *baudtable);
|
||||
|
||||
#endif
|
||||
30
include/edi.h
Normal file
30
include/edi.h
Normal file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __EDI_H__
|
||||
#define __EDI_H__ 1
|
||||
|
||||
#define EDI_READ 0x30
|
||||
#define EDI_WRITE 0x40
|
||||
#define EDI_DISABLE 0xf3
|
||||
|
||||
#define EDI_NOT_READY 0x5f
|
||||
#define EDI_READY 0x50
|
||||
|
||||
#define EDI_READ_BUFFER_LENGTH_DEFAULT 3
|
||||
#define EDI_READ_BUFFER_LENGTH_MAX 32
|
||||
|
||||
#endif
|
||||
51
include/ene.h
Normal file
51
include/ene.h
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __ENE_H__
|
||||
#define __ENE_H__ 1
|
||||
|
||||
#define ENE_XBI_EFA0 0xfea8
|
||||
#define ENE_XBI_EFA1 0xfea9
|
||||
#define ENE_XBI_EFA2 0xfeaa
|
||||
#define ENE_XBI_EFDAT 0xfeab
|
||||
#define ENE_XBI_EFCMD 0xfeac
|
||||
#define ENE_XBI_EFCFG 0xfead
|
||||
|
||||
#define ENE_XBI_EFCFG_CMD_WE (1 << 3)
|
||||
#define ENE_XBI_EFCFG_BUSY (1 << 1)
|
||||
|
||||
#define ENE_XBI_EFCMD_HVPL_LATCH 0x02
|
||||
#define ENE_XBI_EFCMD_READ 0x03
|
||||
#define ENE_XBI_EFCMD_ERASE 0x20
|
||||
#define ENE_XBI_EFCMD_PROGRAM 0x70
|
||||
#define ENE_XBI_EFCMD_HVPL_CLEAR 0x80
|
||||
|
||||
#define ENE_EC_PXCFG 0xff14
|
||||
|
||||
#define ENE_EC_PXCFG_8051_RESET 0x01
|
||||
|
||||
#define ENE_EC_HWVERSION 0xff00
|
||||
#define ENE_EC_EDIID 0xff24
|
||||
|
||||
#define ENE_KB9012_HWVERSION 0xc3
|
||||
#define ENE_KB9012_EDIID 0x04
|
||||
|
||||
struct ene_chip {
|
||||
unsigned char hwversion;
|
||||
unsigned char ediid;
|
||||
};
|
||||
|
||||
#endif
|
||||
494
include/flash.h
Normal file
494
include/flash.h
Normal file
@ -0,0 +1,494 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2000 Silicon Integrated System Corporation
|
||||
* Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
|
||||
* Copyright (C) 2005-2009 coresystems GmbH
|
||||
* Copyright (C) 2006-2009 Carl-Daniel Hailfinger
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __FLASH_H__
|
||||
#define __FLASH_H__ 1
|
||||
|
||||
#include <inttypes.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdarg.h>
|
||||
#include <stdbool.h>
|
||||
#if IS_WINDOWS
|
||||
#include <windows.h>
|
||||
#undef min
|
||||
#undef max
|
||||
#endif
|
||||
|
||||
#include "libflashrom.h"
|
||||
#include "layout.h"
|
||||
#include "writeprotect.h"
|
||||
|
||||
#define KiB (1024)
|
||||
#define MiB (1024 * KiB)
|
||||
|
||||
/* Assumes `n` and `a` are at most 64-bit wide (to avoid typeof() operator). */
|
||||
#define ALIGN_DOWN(n, a) ((n) & ~((uint64_t)(a) - 1))
|
||||
|
||||
#define ERROR_PTR ((void*)-1)
|
||||
|
||||
/* Error codes */
|
||||
#define ERROR_OOM -100
|
||||
#define TIMEOUT_ERROR -101
|
||||
|
||||
/* TODO: check using code for correct usage of types */
|
||||
typedef uintptr_t chipaddr;
|
||||
#define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2))
|
||||
|
||||
int register_shutdown(int (*function) (void *data), void *data);
|
||||
void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void programmer_unmap_flash_region(void *virt_addr, size_t len);
|
||||
void programmer_delay(unsigned int usecs);
|
||||
|
||||
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
|
||||
|
||||
enum chipbustype {
|
||||
BUS_NONE = 0,
|
||||
BUS_PARALLEL = 1 << 0,
|
||||
BUS_LPC = 1 << 1,
|
||||
BUS_FWH = 1 << 2,
|
||||
BUS_SPI = 1 << 3,
|
||||
BUS_PROG = 1 << 4,
|
||||
BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH,
|
||||
};
|
||||
|
||||
/*
|
||||
* The following enum defines possible write granularities of flash chips. These tend to reflect the properties
|
||||
* of the actual hardware not necesserily the write function(s) defined by the respective struct flashchip.
|
||||
* The latter might (and should) be more precisely specified, e.g. they might bail out early if their execution
|
||||
* would result in undefined chip contents.
|
||||
*/
|
||||
enum write_granularity {
|
||||
/* We assume 256 byte granularity by default. */
|
||||
write_gran_256bytes = 0,/* If less than 256 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_1bit, /* Each bit can be cleared individually. */
|
||||
write_gran_1byte, /* A byte can be written once. Further writes to an already written byte cause
|
||||
* its contents to be either undefined or to stay unchanged. */
|
||||
write_gran_128bytes, /* If less than 128 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_264bytes, /* If less than 264 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_512bytes, /* If less than 512 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_528bytes, /* If less than 528 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_1024bytes, /* If less than 1024 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_1056bytes, /* If less than 1056 bytes are written, the unwritten bytes are undefined. */
|
||||
write_gran_1byte_implicit_erase, /* EEPROMs and other chips with implicit erase and 1-byte writes. */
|
||||
};
|
||||
|
||||
/*
|
||||
* How many different contiguous runs of erase blocks with one size each do
|
||||
* we have for a given erase function?
|
||||
*/
|
||||
#define NUM_ERASEREGIONS 5
|
||||
|
||||
/*
|
||||
* How many different erase functions do we have per chip?
|
||||
* Macronix MX25L25635F has 8 different functions.
|
||||
*/
|
||||
#define NUM_ERASEFUNCTIONS 8
|
||||
|
||||
#define MAX_CHIP_RESTORE_FUNCTIONS 4
|
||||
|
||||
/* Feature bits used for non-SPI only */
|
||||
#define FEATURE_REGISTERMAP (1 << 0)
|
||||
#define FEATURE_LONG_RESET (0 << 4)
|
||||
#define FEATURE_SHORT_RESET (1 << 4)
|
||||
#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
|
||||
#define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET)
|
||||
#define FEATURE_ADDR_FULL (0 << 2)
|
||||
#define FEATURE_ADDR_MASK (3 << 2)
|
||||
#define FEATURE_ADDR_2AA (1 << 2)
|
||||
#define FEATURE_ADDR_AAA (2 << 2)
|
||||
#define FEATURE_ADDR_SHIFTED (1 << 5)
|
||||
/* Feature bits used for SPI only */
|
||||
#define FEATURE_WRSR_EWSR (1 << 6)
|
||||
#define FEATURE_WRSR_WREN (1 << 7)
|
||||
#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
|
||||
#define FEATURE_OTP (1 << 8)
|
||||
#define FEATURE_QPI (1 << 9)
|
||||
#define FEATURE_4BA_ENTER (1 << 10) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN */
|
||||
#define FEATURE_4BA_ENTER_WREN (1 << 11) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN */
|
||||
#define FEATURE_4BA_ENTER_EAR7 (1 << 12) /**< Can enter/exit 4BA mode by setting bit7 of the ext addr reg */
|
||||
#define FEATURE_4BA_EXT_ADDR (1 << 13) /**< Regular 3-byte operations can be used by writing the most
|
||||
significant address byte into an extended address register. */
|
||||
#define FEATURE_4BA_READ (1 << 14) /**< Native 4BA read instruction (0x13) is supported. */
|
||||
#define FEATURE_4BA_FAST_READ (1 << 15) /**< Native 4BA fast read instruction (0x0c) is supported. */
|
||||
#define FEATURE_4BA_WRITE (1 << 16) /**< Native 4BA byte program (0x12) is supported. */
|
||||
/* 4BA Shorthands */
|
||||
#define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE)
|
||||
#define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
|
||||
#define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
|
||||
#define FEATURE_4BA_EAR7 (FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
|
||||
/*
|
||||
* Most flash chips are erased to ones and programmed to zeros. However, some
|
||||
* other flash chips, such as the ENE KB9012 internal flash, work the opposite way.
|
||||
*/
|
||||
#define FEATURE_ERASED_ZERO (1 << 17)
|
||||
#define FEATURE_NO_ERASE (1 << 18)
|
||||
|
||||
#define FEATURE_WRSR_EXT (1 << 19)
|
||||
#define FEATURE_WRSR2 (1 << 20)
|
||||
|
||||
#define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff)
|
||||
|
||||
enum test_state {
|
||||
OK = 0,
|
||||
NT = 1, /* Not tested */
|
||||
BAD, /* Known to not work */
|
||||
DEP, /* Support depends on configuration (e.g. Intel flash descriptor) */
|
||||
NA, /* Not applicable (e.g. write support on ROM chips) */
|
||||
};
|
||||
|
||||
#define TEST_UNTESTED (struct tested){ .probe = NT, .read = NT, .erase = NT, .write = NT }
|
||||
|
||||
#define TEST_OK_PROBE (struct tested){ .probe = OK, .read = NT, .erase = NT, .write = NT }
|
||||
#define TEST_OK_PR (struct tested){ .probe = OK, .read = OK, .erase = NT, .write = NT }
|
||||
#define TEST_OK_PRE (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = NT }
|
||||
#define TEST_OK_PREW (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = OK }
|
||||
|
||||
#define TEST_BAD_PROBE (struct tested){ .probe = BAD, .read = NT, .erase = NT, .write = NT }
|
||||
#define TEST_BAD_PR (struct tested){ .probe = BAD, .read = BAD, .erase = NT, .write = NT }
|
||||
#define TEST_BAD_PRE (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = NT }
|
||||
#define TEST_BAD_PREW (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD }
|
||||
|
||||
struct flashrom_flashctx;
|
||||
#define flashctx flashrom_flashctx /* TODO: Agree on a name and convert all occurences. */
|
||||
typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
|
||||
|
||||
enum flash_reg {
|
||||
INVALID_REG = 0,
|
||||
STATUS1,
|
||||
STATUS2,
|
||||
STATUS3,
|
||||
MAX_REGISTERS
|
||||
};
|
||||
|
||||
struct reg_bit_info {
|
||||
/* Register containing the bit */
|
||||
enum flash_reg reg;
|
||||
|
||||
/* Bit index within register */
|
||||
uint8_t bit_index;
|
||||
|
||||
/*
|
||||
* Writability of the bit. RW does not guarantee the bit will be
|
||||
* writable, for example if status register protection is enabled.
|
||||
*/
|
||||
enum {
|
||||
RO, /* Read only */
|
||||
RW, /* Readable and writable */
|
||||
OTP /* One-time programmable */
|
||||
} writability;
|
||||
};
|
||||
|
||||
struct wp_bits;
|
||||
|
||||
struct flashchip {
|
||||
const char *vendor;
|
||||
const char *name;
|
||||
|
||||
enum chipbustype bustype;
|
||||
|
||||
/*
|
||||
* With 32bit manufacture_id and model_id we can cover IDs up to
|
||||
* (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
|
||||
* Identification code.
|
||||
*/
|
||||
uint32_t manufacture_id;
|
||||
uint32_t model_id;
|
||||
|
||||
/* Total chip size in kilobytes */
|
||||
unsigned int total_size;
|
||||
/* Chip page size in bytes */
|
||||
unsigned int page_size;
|
||||
int feature_bits;
|
||||
|
||||
/* Indicate how well flashrom supports different operations of this flash chip. */
|
||||
struct tested {
|
||||
enum test_state probe;
|
||||
enum test_state read;
|
||||
enum test_state erase;
|
||||
enum test_state write;
|
||||
} tested;
|
||||
|
||||
/*
|
||||
* Group chips that have common command sets. This should ensure that
|
||||
* no chip gets confused by a probing command for a very different class
|
||||
* of chips.
|
||||
*/
|
||||
enum {
|
||||
/* SPI25 is very common. Keep it at zero so we don't have
|
||||
to specify it for each and every chip in the database.*/
|
||||
SPI25 = 0,
|
||||
SPI_EDI = 1,
|
||||
} spi_cmd_set;
|
||||
|
||||
int (*probe) (struct flashctx *flash);
|
||||
|
||||
/* Delay after "enter/exit ID mode" commands in microseconds.
|
||||
* NB: negative values have special meanings, see TIMING_* below.
|
||||
*/
|
||||
signed int probe_timing;
|
||||
|
||||
/*
|
||||
* Erase blocks and associated erase function. Any chip erase function
|
||||
* is stored as chip-sized virtual block together with said function.
|
||||
* The first one that fits will be chosen. There is currently no way to
|
||||
* influence that behaviour. For testing just comment out the other
|
||||
* elements or set the function pointer to NULL.
|
||||
*/
|
||||
struct block_eraser {
|
||||
struct eraseblock {
|
||||
unsigned int size; /* Eraseblock size in bytes */
|
||||
unsigned int count; /* Number of contiguous blocks with that size */
|
||||
} eraseblocks[NUM_ERASEREGIONS];
|
||||
/* a block_erase function should try to erase one block of size
|
||||
* 'blocklen' at address 'blockaddr' and return 0 on success. */
|
||||
int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
|
||||
} block_erasers[NUM_ERASEFUNCTIONS];
|
||||
|
||||
int (*printlock) (struct flashctx *flash);
|
||||
int (*unlock) (struct flashctx *flash);
|
||||
int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
uint8_t (*read_status) (const struct flashctx *flash);
|
||||
int (*write_status) (const struct flashctx *flash, int status);
|
||||
struct voltage {
|
||||
uint16_t min;
|
||||
uint16_t max;
|
||||
} voltage;
|
||||
enum write_granularity gran;
|
||||
|
||||
/* SPI specific options (TODO: Make it a union in case other bustypes get specific options.) */
|
||||
uint8_t wrea_override; /**< override opcode for write extended address register */
|
||||
|
||||
struct reg_bit_map {
|
||||
/* Status register protection bit (SRP) */
|
||||
struct reg_bit_info srp;
|
||||
|
||||
/* Status register lock bit (SRP) */
|
||||
struct reg_bit_info srl;
|
||||
|
||||
/*
|
||||
* Note: some datasheets refer to configuration bits that
|
||||
* function like TB/SEC/CMP bits as BP bits (e.g. BP3 for a bit
|
||||
* that functions like TB).
|
||||
*
|
||||
* As a convention, any config bit that functions like a
|
||||
* TB/SEC/CMP bit should be assigned to the respective
|
||||
* tb/sec/cmp field in this structure, even if the datasheet
|
||||
* uses a different name.
|
||||
*/
|
||||
|
||||
/* Block protection bits (BP) */
|
||||
/* Extra element for terminator */
|
||||
struct reg_bit_info bp[MAX_BP_BITS + 1];
|
||||
|
||||
/* Top/bottom protection bit (TB) */
|
||||
struct reg_bit_info tb;
|
||||
|
||||
/* Sector/block protection bit (SEC) */
|
||||
struct reg_bit_info sec;
|
||||
|
||||
/* Complement bit (CMP) */
|
||||
struct reg_bit_info cmp;
|
||||
|
||||
/* Write Protect Selection (per sector protection when set) */
|
||||
struct reg_bit_info wps;
|
||||
} reg_bits;
|
||||
|
||||
/* Function that takes a set of WP config bits (e.g. BP, SEC, TB, etc) */
|
||||
/* and determines what protection range they select. */
|
||||
void (*decode_range)(size_t *start, size_t *len, const struct wp_bits *, size_t chip_len);
|
||||
};
|
||||
|
||||
typedef int (*chip_restore_fn_cb_t)(struct flashctx *flash, uint8_t status);
|
||||
|
||||
struct flashrom_flashctx {
|
||||
struct flashchip *chip;
|
||||
/* FIXME: The memory mappings should be saved in a more structured way. */
|
||||
/* The physical_* fields store the respective addresses in the physical address space of the CPU. */
|
||||
uintptr_t physical_memory;
|
||||
/* The virtual_* fields store where the respective physical address is mapped into flashrom's address
|
||||
* space. A value equivalent to (chipaddr)ERROR_PTR indicates an invalid mapping (or none at all). */
|
||||
chipaddr virtual_memory;
|
||||
/* Some flash devices have an additional register space; semantics are like above. */
|
||||
uintptr_t physical_registers;
|
||||
chipaddr virtual_registers;
|
||||
struct registered_master *mst;
|
||||
const struct flashrom_layout *layout;
|
||||
struct flashrom_layout *default_layout;
|
||||
struct {
|
||||
bool force;
|
||||
bool force_boardmismatch;
|
||||
bool verify_after_write;
|
||||
bool verify_whole_chip;
|
||||
} flags;
|
||||
/* We cache the state of the extended address register (highest byte
|
||||
* of a 4BA for 3BA instructions) and the state of the 4BA mode here.
|
||||
* If possible, we enter 4BA mode early. If that fails, we make use
|
||||
* of the extended address register.
|
||||
*/
|
||||
int address_high_byte;
|
||||
bool in_4ba_mode;
|
||||
|
||||
int chip_restore_fn_count;
|
||||
struct chip_restore_func_data {
|
||||
chip_restore_fn_cb_t func;
|
||||
uint8_t status;
|
||||
} chip_restore_fn[MAX_CHIP_RESTORE_FUNCTIONS];
|
||||
};
|
||||
|
||||
/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
|
||||
* field and zero delay.
|
||||
*
|
||||
* SPI devices will always have zero delay and ignore this field.
|
||||
*/
|
||||
#define TIMING_FIXME -1
|
||||
/* this is intentionally same value as fixme */
|
||||
#define TIMING_IGNORED -1
|
||||
#define TIMING_ZERO -2
|
||||
|
||||
extern const struct flashchip flashchips[];
|
||||
extern const unsigned int flashchips_size;
|
||||
|
||||
void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
|
||||
void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
|
||||
void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
|
||||
void chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
|
||||
uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
|
||||
uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
|
||||
uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
|
||||
void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
|
||||
|
||||
/* print.c */
|
||||
int print_supported(void);
|
||||
void print_supported_wiki(void);
|
||||
|
||||
/* helpers.c */
|
||||
uint32_t address_to_bits(uint32_t addr);
|
||||
unsigned int bitcount(unsigned long a);
|
||||
#undef MIN
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#undef MAX
|
||||
#define MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
int max(int a, int b);
|
||||
int min(int a, int b);
|
||||
char *strcat_realloc(char *dest, const char *src);
|
||||
void tolower_string(char *str);
|
||||
uint8_t reverse_byte(uint8_t x);
|
||||
void reverse_bytes(uint8_t *dst, const uint8_t *src, size_t length);
|
||||
#ifdef __MINGW32__
|
||||
char* strtok_r(char *str, const char *delim, char **nextp);
|
||||
char *strndup(const char *str, size_t size);
|
||||
#endif
|
||||
#if defined(__DJGPP__) || (!defined(__LIBPAYLOAD__) && !defined(HAVE_STRNLEN))
|
||||
size_t strnlen(const char *str, size_t n);
|
||||
#endif
|
||||
|
||||
/* flashrom.c */
|
||||
extern const char flashrom_version[];
|
||||
extern const char *chip_to_probe;
|
||||
char *flashbuses_to_text(enum chipbustype bustype);
|
||||
int map_flash(struct flashctx *flash);
|
||||
void unmap_flash(struct flashctx *flash);
|
||||
int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int erase_flash(struct flashctx *flash);
|
||||
int probe_flash(struct registered_master *mst, int startchip, struct flashctx *fill_flash, int force);
|
||||
int read_flash_to_file(struct flashctx *flash, const char *filename);
|
||||
int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len);
|
||||
int need_erase(const uint8_t *have, const uint8_t *want, unsigned int len, enum write_granularity gran, const uint8_t erased_value);
|
||||
void emergency_help_message(void);
|
||||
void print_version(void);
|
||||
void print_buildinfo(void);
|
||||
void print_banner(void);
|
||||
void list_programmers_linebreak(int startcol, int cols, int paren);
|
||||
int selfcheck(void);
|
||||
int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
|
||||
int read_buf_from_include_args(const struct flashctx *const flash, unsigned char *buf);
|
||||
int write_buf_to_file(const unsigned char *buf, unsigned long size, const char *filename);
|
||||
int write_buf_to_include_args(const struct flashctx *const flash, unsigned char *buf);
|
||||
int prepare_flash_access(struct flashctx *, bool read_it, bool write_it, bool erase_it, bool verify_it);
|
||||
void finalize_flash_access(struct flashctx *);
|
||||
int register_chip_restore(chip_restore_fn_cb_t func, struct flashctx *flash, uint8_t status);
|
||||
|
||||
/* Something happened that shouldn't happen, but we can go on. */
|
||||
#define ERROR_NONFATAL 0x100
|
||||
|
||||
/* Something happened that shouldn't happen, we'll abort. */
|
||||
#define ERROR_FATAL -0xee
|
||||
#define ERROR_FLASHROM_BUG -200
|
||||
/* We reached one of the hardcoded limits of flashrom. This can be fixed by
|
||||
* increasing the limit of a compile-time allocation or by switching to dynamic
|
||||
* allocation.
|
||||
* Note: If this warning is triggered, check first for runaway registrations.
|
||||
*/
|
||||
#define ERROR_FLASHROM_LIMIT -201
|
||||
|
||||
/* cli_common.c */
|
||||
void print_chip_support_status(const struct flashchip *chip);
|
||||
|
||||
/* cli_output.c */
|
||||
extern enum flashrom_log_level verbose_screen;
|
||||
extern enum flashrom_log_level verbose_logfile;
|
||||
int open_logfile(const char * const filename);
|
||||
int close_logfile(void);
|
||||
void start_logging(void);
|
||||
int flashrom_print_cb(enum flashrom_log_level level, const char *fmt, va_list ap);
|
||||
/* Let gcc and clang check for correct printf-style format strings. */
|
||||
int print(enum flashrom_log_level level, const char *fmt, ...)
|
||||
#ifdef __MINGW32__
|
||||
# ifndef __MINGW_PRINTF_FORMAT
|
||||
# define __MINGW_PRINTF_FORMAT gnu_printf
|
||||
# endif
|
||||
__attribute__((format(__MINGW_PRINTF_FORMAT, 2, 3)));
|
||||
#else
|
||||
__attribute__((format(printf, 2, 3)));
|
||||
#endif
|
||||
#define msg_gerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* general errors */
|
||||
#define msg_perr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* programmer errors */
|
||||
#define msg_cerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* chip errors */
|
||||
#define msg_gwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* general warnings */
|
||||
#define msg_pwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* programmer warnings */
|
||||
#define msg_cwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* chip warnings */
|
||||
#define msg_ginfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* general info */
|
||||
#define msg_pinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* programmer info */
|
||||
#define msg_cinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* chip info */
|
||||
#define msg_gdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* general debug */
|
||||
#define msg_pdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* programmer debug */
|
||||
#define msg_cdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* chip debug */
|
||||
#define msg_gdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* general debug2 */
|
||||
#define msg_pdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */
|
||||
#define msg_cdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */
|
||||
#define msg_gspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* general debug spew */
|
||||
#define msg_pspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* programmer debug spew */
|
||||
#define msg_cspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* chip debug spew */
|
||||
|
||||
/* spi.c */
|
||||
struct spi_command {
|
||||
unsigned int writecnt;
|
||||
unsigned int readcnt;
|
||||
const unsigned char *writearr;
|
||||
unsigned char *readarr;
|
||||
};
|
||||
#define NULL_SPI_CMD { 0, 0, NULL, NULL, }
|
||||
int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
|
||||
int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
|
||||
|
||||
enum chipbustype get_buses_supported(void);
|
||||
#endif /* !__FLASH_H__ */
|
||||
1033
include/flashchips.h
Normal file
1033
include/flashchips.h
Normal file
File diff suppressed because it is too large
Load Diff
71
include/fmap.h
Normal file
71
include/fmap.h
Normal file
@ -0,0 +1,71 @@
|
||||
/*
|
||||
* Copyright 2010, Google LLC.
|
||||
* Copyright 2018-present, Facebook Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following disclaimer
|
||||
* in the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Google Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||
* Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __FMAP_H__
|
||||
#define __FMAP_H__ 1
|
||||
|
||||
#include <inttypes.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#define FMAP_SIGNATURE "__FMAP__"
|
||||
#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */
|
||||
#define FMAP_VER_MINOR 1 /* this header's FMAP minor version */
|
||||
#define FMAP_STRLEN 32 /* maximum length for strings */
|
||||
|
||||
struct fmap_area {
|
||||
uint32_t offset; /* offset relative to base */
|
||||
uint32_t size; /* size in bytes */
|
||||
uint8_t name[FMAP_STRLEN]; /* descriptive name */
|
||||
uint16_t flags; /* flags for this area */
|
||||
} __attribute__((packed));
|
||||
|
||||
struct fmap {
|
||||
uint8_t signature[8]; /* "__FMAP__" */
|
||||
uint8_t ver_major; /* major version */
|
||||
uint8_t ver_minor; /* minor version */
|
||||
uint64_t base; /* address of the firmware binary */
|
||||
uint32_t size; /* size of firmware binary in bytes */
|
||||
uint8_t name[FMAP_STRLEN]; /* name of this firmware binary */
|
||||
uint16_t nareas; /* number of areas described by
|
||||
fmap_areas[] below */
|
||||
struct fmap_area areas[];
|
||||
} __attribute__((packed));
|
||||
|
||||
int fmap_read_from_buffer(struct fmap **fmap_out, const uint8_t *buf, size_t len);
|
||||
int fmap_read_from_rom(struct fmap **fmap_out, struct flashctx *const flashctx, size_t rom_offset, size_t len);
|
||||
|
||||
|
||||
#endif /* __FMAP_H__*/
|
||||
59
include/hwaccess_physmap.h
Normal file
59
include/hwaccess_physmap.h
Normal file
@ -0,0 +1,59 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __HWACCESS_PHYSMAP_H__
|
||||
#define __HWACCESS_PHYSMAP_H__
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void physunmap(void *virt_addr, size_t len);
|
||||
void physunmap_unaligned(void *virt_addr, size_t len);
|
||||
|
||||
void mmio_writeb(uint8_t val, void *addr);
|
||||
void mmio_writew(uint16_t val, void *addr);
|
||||
void mmio_writel(uint32_t val, void *addr);
|
||||
uint8_t mmio_readb(const void *addr);
|
||||
uint16_t mmio_readw(const void *addr);
|
||||
uint32_t mmio_readl(const void *addr);
|
||||
void mmio_readn(const void *addr, uint8_t *buf, size_t len);
|
||||
void mmio_le_writeb(uint8_t val, void *addr);
|
||||
void mmio_le_writew(uint16_t val, void *addr);
|
||||
void mmio_le_writel(uint32_t val, void *addr);
|
||||
uint8_t mmio_le_readb(const void *addr);
|
||||
uint16_t mmio_le_readw(const void *addr);
|
||||
uint32_t mmio_le_readl(const void *addr);
|
||||
#define pci_mmio_writeb mmio_le_writeb
|
||||
#define pci_mmio_writew mmio_le_writew
|
||||
#define pci_mmio_writel mmio_le_writel
|
||||
#define pci_mmio_readb mmio_le_readb
|
||||
#define pci_mmio_readw mmio_le_readw
|
||||
#define pci_mmio_readl mmio_le_readl
|
||||
void rmmio_writeb(uint8_t val, void *addr);
|
||||
void rmmio_writew(uint16_t val, void *addr);
|
||||
void rmmio_writel(uint32_t val, void *addr);
|
||||
void rmmio_le_writeb(uint8_t val, void *addr);
|
||||
void rmmio_le_writew(uint16_t val, void *addr);
|
||||
void rmmio_le_writel(uint32_t val, void *addr);
|
||||
#define pci_rmmio_writeb rmmio_le_writeb
|
||||
#define pci_rmmio_writew rmmio_le_writew
|
||||
#define pci_rmmio_writel rmmio_le_writel
|
||||
void rmmio_valb(void *addr);
|
||||
void rmmio_valw(void *addr);
|
||||
void rmmio_vall(void *addr);
|
||||
|
||||
#endif /* __HWACCESS_PHYSMAP_H__ */
|
||||
37
include/hwaccess_x86_io.h
Normal file
37
include/hwaccess_x86_io.h
Normal file
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2009 Carl-Daniel Hailfinger
|
||||
* Copyright (C) 2022 secunet Security Networks AG
|
||||
* (Written by Thomas Heijligen <thomas.heijligen@secunet.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains prototypes for x86 I/O Port access.
|
||||
*/
|
||||
|
||||
#ifndef __HWACCESS_X86_IO_H__
|
||||
#define __HWACCESS_X86_IO_H__ 1
|
||||
|
||||
#include <stdint.h>
|
||||
/**
|
||||
*/
|
||||
int rget_io_perms(void);
|
||||
|
||||
void OUTB(uint8_t value, uint16_t port);
|
||||
void OUTW(uint16_t value, uint16_t port);
|
||||
void OUTL(uint32_t value, uint16_t port);
|
||||
uint8_t INB(uint16_t port);
|
||||
uint16_t INW(uint16_t port);
|
||||
uint32_t INL(uint16_t port);
|
||||
|
||||
#endif /* __HWACCESS_X86_IO_H__ */
|
||||
28
include/hwaccess_x86_msr.h
Normal file
28
include/hwaccess_x86_msr.h
Normal file
@ -0,0 +1,28 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2009 Carl-Daniel Hailfinger
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __HWACCESS_X86_MSR_H__
|
||||
#define __HWACCESS_X86_MSR_H__ 1
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct { uint32_t hi, lo; } msr_t;
|
||||
|
||||
msr_t msr_read(int addr);
|
||||
int msr_write(int addr, msr_t msr);
|
||||
int msr_setup(int cpu);
|
||||
void msr_cleanup(void);
|
||||
|
||||
#endif /* __HWACCESS_X86_MSR_H__ */
|
||||
129
include/i2c_helper.h
Normal file
129
include/i2c_helper.h
Normal file
@ -0,0 +1,129 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2020 The Chromium OS Authors
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef I2C_HELPER_H
|
||||
#define I2C_HELPER_H
|
||||
|
||||
#include <inttypes.h>
|
||||
|
||||
/**
|
||||
* An convinent structure that contains the buffer size and the buffer
|
||||
* pointer. Used to wrap buffer details while doing the I2C data
|
||||
* transfer on both input and output. It is the client's responsibility
|
||||
* to use i2c_buffer_t_fill to initialize this struct instead of
|
||||
* trying to construct it directly.
|
||||
*/
|
||||
typedef struct {
|
||||
void *buf;
|
||||
uint16_t len;
|
||||
} i2c_buffer_t;
|
||||
|
||||
/**
|
||||
* i2c_buffer_t_fill - fills in the i2c_buffer_t
|
||||
*
|
||||
* @i2c_buf: pointer to the be constructed.
|
||||
* @buf: buffer contains data to be included in i2c_buffer_t.
|
||||
* @len: length of buffer to be included in i2c_buffer_t.
|
||||
*
|
||||
* This function takes in a pointer to an initialized i2c_buffer_t
|
||||
* object with related information, and fill in the i2c_buffer_t with
|
||||
* some validation applied. The function does allow initialization with
|
||||
* NULL buffer but will make sure len == 0 in such case.
|
||||
*
|
||||
* returns 0 on success, <0 to indicate failure
|
||||
*/
|
||||
static inline int i2c_buffer_t_fill(i2c_buffer_t *i2c_buf, void *buf, uint16_t len)
|
||||
{
|
||||
if (!i2c_buf || (!buf && len))
|
||||
return -1;
|
||||
|
||||
i2c_buf->buf = buf;
|
||||
i2c_buf->len = len;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* i2c_open - opens the target I2C device and set the I2C slave address
|
||||
*
|
||||
* @bus: I2C bus number of the target device.
|
||||
* @addr: I2C slave address.
|
||||
* @force: whether to force set the I2C slave address.
|
||||
*
|
||||
* This function returns a file descriptor for the target device. It is
|
||||
* the client's responsibility to pass the return value to i2c_close to
|
||||
* clean up.
|
||||
*
|
||||
* returns fd of target device on success, <0 to indicate failure
|
||||
*/
|
||||
int i2c_open(int bus, uint16_t addr, int force);
|
||||
|
||||
/**
|
||||
* i2c_open_path: open an I2C device by device path
|
||||
*
|
||||
* This function behaves the same as i2c_open, but takes a filesystem
|
||||
* path (assumed to be an I2C device file) instead of a bus number.
|
||||
*/
|
||||
int i2c_open_path(const char *path, uint16_t addr, int force);
|
||||
|
||||
/**
|
||||
* i2c_open_from_programmer_params: open an I2C device from programmer params
|
||||
*
|
||||
* This function is a wrapper for i2c_open and i2c_open_path that obtains the
|
||||
* I2C device to use from programmer parameters. It is meant to be called
|
||||
* from I2C-based programmers to avoid repeating parameter parsing code.
|
||||
*/
|
||||
int i2c_open_from_programmer_params(uint16_t addr, int force);
|
||||
|
||||
/**
|
||||
* i2c_close - closes the file descriptor returned by i2c_open
|
||||
*
|
||||
* @fd: file descriptor to be closed.
|
||||
*
|
||||
* It is the client's responsibility to set fd = -1 when it is
|
||||
* done with it.
|
||||
*
|
||||
* returns 0 on success, <0 to indicate failure
|
||||
*/
|
||||
int i2c_close(int fd);
|
||||
|
||||
/**
|
||||
* i2c_read - reads data from the I2C device
|
||||
*
|
||||
* @fd: file descriptor of the target device.
|
||||
* @addr: I2C slave address of the target device.
|
||||
* @buf_read: data struct includes reading buffer and size.
|
||||
*
|
||||
* This function does accept empty read and do nothing on such case.
|
||||
*
|
||||
* returns read length on success, <0 to indicate failure
|
||||
*/
|
||||
int i2c_read(int fd, uint16_t addr, i2c_buffer_t *buf_read);
|
||||
|
||||
/**
|
||||
* i2c_write - writes command/data into the I2C device
|
||||
*
|
||||
* @fd: file descriptor of the target device.
|
||||
* @addr: I2C slave address of the target device.
|
||||
* @buf_write: data struct includes writting buffer and size.
|
||||
*
|
||||
* This function does accept empty write and do nothing on such case.
|
||||
*
|
||||
* returns wrote length on success, <0 to indicate failure.
|
||||
*/
|
||||
int i2c_write(int fd, uint16_t addr, const i2c_buffer_t *buf_write);
|
||||
|
||||
#endif /* !I2C_HELPER_H */
|
||||
595
include/ich_descriptors.h
Normal file
595
include/ich_descriptors.h
Normal file
@ -0,0 +1,595 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (c) 2010 Matthias Wenzel <bios at mazzoo dot de>
|
||||
* Copyright (c) 2011 Stefan Tauner
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __ICH_DESCRIPTORS_H__
|
||||
#define __ICH_DESCRIPTORS_H__ 1
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include "programmer.h" /* for enum ich_chipset */
|
||||
|
||||
/* FIXME: Replace with generic return codes */
|
||||
#define ICH_RET_OK 0
|
||||
#define ICH_RET_ERR -1
|
||||
#define ICH_RET_WARN -2
|
||||
#define ICH_RET_PARAM -3
|
||||
#define ICH_RET_OOB -4
|
||||
|
||||
#define ICH9_REG_FDOC 0xB0 /* 32 Bits Flash Descriptor Observability Control */
|
||||
#define PCH100_REG_FDOC 0xB4 /* New offset from Sunrise Point on */
|
||||
/* 0-1: reserved */
|
||||
#define FDOC_FDSI_OFF 2 /* 2-11: Flash Descriptor Section Index */
|
||||
#define FDOC_FDSI (0x3f << FDOC_FDSI_OFF)
|
||||
#define FDOC_FDSS_OFF 12 /* 12-14: Flash Descriptor Section Select */
|
||||
#define FDOC_FDSS (0x3 << FDOC_FDSS_OFF)
|
||||
/* 15-31: reserved */
|
||||
|
||||
#define ICH9_REG_FDOD 0xB4 /* 32 Bits Flash Descriptor Observability Data */
|
||||
#define PCH100_REG_FDOD 0xB8 /* New offset from Sunrise Point on */
|
||||
|
||||
/* Field locations and semantics for LVSCC, UVSCC and related words in the flash
|
||||
* descriptor are equal therefore they all share the same macros below. */
|
||||
#define VSCC_BES_OFF 0 /* 0-1: Block/Sector Erase Size */
|
||||
#define VSCC_BES (0x3 << VSCC_BES_OFF)
|
||||
#define VSCC_WG_OFF 2 /* 2: Write Granularity */
|
||||
#define VSCC_WG (0x1 << VSCC_WG_OFF)
|
||||
#define VSCC_WSR_OFF 3 /* 3: Write Status Required */
|
||||
#define VSCC_WSR (0x1 << VSCC_WSR_OFF)
|
||||
#define VSCC_WEWS_OFF 4 /* 4: Write Enable on Write Status */
|
||||
#define VSCC_WEWS (0x1 << VSCC_WEWS_OFF)
|
||||
/* 5-7: reserved */
|
||||
#define VSCC_EO_OFF 8 /* 8-15: Erase Opcode */
|
||||
#define VSCC_EO (0xff << VSCC_EO_OFF)
|
||||
/* 16-22: reserved */
|
||||
#define VSCC_VCL_OFF 23 /* 23: Vendor Component Lock */
|
||||
#define VSCC_VCL (0x1 << VSCC_VCL_OFF)
|
||||
/* 24-31: reserved */
|
||||
|
||||
#define ICH_FREG_BASE(flreg) (((flreg) << 12) & 0x07fff000)
|
||||
#define ICH_FREG_LIMIT(flreg) ((((flreg) >> 4) & 0x07fff000) | 0x00000fff)
|
||||
|
||||
void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity, bool print_vcl);
|
||||
|
||||
struct ich_desc_content {
|
||||
uint32_t FLVALSIG; /* 0x00 */
|
||||
union { /* 0x04 */
|
||||
uint32_t FLMAP0;
|
||||
struct {
|
||||
uint32_t FCBA :8, /* Flash Component Base Address */
|
||||
NC :2, /* Number Of Components */
|
||||
:6,
|
||||
FRBA :8, /* Flash Region Base Address */
|
||||
NR :3, /* Number Of Regions (reserved from Skylake on) */
|
||||
:5;
|
||||
};
|
||||
};
|
||||
union { /* 0x08 */
|
||||
uint32_t FLMAP1;
|
||||
struct {
|
||||
uint32_t FMBA :8, /* Flash Master Base Address */
|
||||
NM :3, /* Number Of Masters */
|
||||
:5,
|
||||
FISBA :8, /* Flash ICH Strap Base Address */
|
||||
ISL :8; /* ICH Strap Length */
|
||||
};
|
||||
};
|
||||
union { /* 0x0c */
|
||||
uint32_t FLMAP2;
|
||||
struct {
|
||||
uint32_t FMSBA :8, /* Flash (G)MCH Strap Base Addr. */
|
||||
MSL :8, /* MCH Strap Length */
|
||||
ICCRIBA :8, /* ICC Reg. Init Base Addr. (new since Sandy Bridge) */
|
||||
RIL :8; /* Register Init Length (new since Hawell) */
|
||||
};
|
||||
struct { /* new since Tiger Point */
|
||||
uint32_t :2,
|
||||
CSSO :10, /* CPU Soft Strap Offset from PMC Base */
|
||||
:4,
|
||||
CSSL :8, /* CPU Soft Strap Length */
|
||||
:8;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
struct ich_desc_component {
|
||||
union { /* 0x00 */
|
||||
uint32_t FLCOMP; /* Flash Components Register */
|
||||
/* FLCOMP encoding on various generations:
|
||||
*
|
||||
* Chipset/Generation max_speed dual_output density
|
||||
* [MHz] bits max. bits
|
||||
* ICH8: 33 N/A 5 0:2, 3:5
|
||||
* ICH9: 33 N/A 5 0:2, 3:5
|
||||
* ICH10: 33 N/A 5 0:2, 3:5
|
||||
* Ibex Peak/5: 50 N/A 5 0:2, 3:5
|
||||
* Cougar Point/6: 50 30 5 0:2, 3:5
|
||||
* Patsburg: 50 30 5 0:2, 3:5
|
||||
* Panther Point/7 50 30 5 0:2, 3:5
|
||||
* Lynx Point/8: 50 30 7 0:3, 4:7
|
||||
* Wildcat Point/9: 50 30 (multi I/O) 7 0:3, 4:7
|
||||
* Sunrise Point/100: 48 30 7 0:3, 4:7
|
||||
*/
|
||||
struct {
|
||||
uint32_t :17,
|
||||
freq_read :3,
|
||||
fastread :1,
|
||||
freq_fastread :3,
|
||||
freq_write :3,
|
||||
freq_read_id :3,
|
||||
dual_output :1, /* new since Cougar Point/6 */
|
||||
:1;
|
||||
} modes;
|
||||
struct {
|
||||
uint32_t comp1_density :3,
|
||||
comp2_density :3,
|
||||
:26;
|
||||
} dens_old;
|
||||
struct {
|
||||
uint32_t comp1_density :4, /* new since Lynx Point/8 */
|
||||
comp2_density :4,
|
||||
:24;
|
||||
} dens_new;
|
||||
};
|
||||
union { /* 0x04 */
|
||||
uint32_t FLILL; /* Flash Invalid Instructions Register */
|
||||
struct {
|
||||
uint32_t invalid_instr0 :8,
|
||||
invalid_instr1 :8,
|
||||
invalid_instr2 :8,
|
||||
invalid_instr3 :8;
|
||||
};
|
||||
};
|
||||
union { /* 0x08 */
|
||||
uint32_t FLPB; /* Flash Partition Boundary Register, until Panther Point/7 */
|
||||
struct {
|
||||
uint32_t FPBA :13, /* Flash Partition Boundary Addr */
|
||||
:19;
|
||||
};
|
||||
uint32_t FLILL1; /* Flash Invalid Instructions Register, new since Sunrise Point/100 */
|
||||
struct {
|
||||
uint32_t invalid_instr4 :8,
|
||||
invalid_instr5 :8,
|
||||
invalid_instr6 :8,
|
||||
invalid_instr7 :8;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#define MAX_NUM_FLREGS 16
|
||||
struct ich_desc_region {
|
||||
/*
|
||||
* Number of entries and width differ on various generations:
|
||||
*
|
||||
* Chipset/Generation #FLREGs width (bits)
|
||||
* ICH8 .. Panther Point/7 5 13
|
||||
* Lynx Point/8 .. Wildcat Point/9 7 15
|
||||
* Sunrise Point/100 .. 200 Series 10 15
|
||||
* Lewisburg/100 .. 16 15
|
||||
* Cannon Point/300 .. 16 15
|
||||
*/
|
||||
union {
|
||||
uint32_t FLREGs[MAX_NUM_FLREGS]; /* Flash Descriptor Regions */
|
||||
|
||||
/* only used for bit-field check */
|
||||
struct {
|
||||
uint32_t base :13,
|
||||
:3,
|
||||
limit :13,
|
||||
:3;
|
||||
} old_reg[MAX_NUM_FLREGS];
|
||||
};
|
||||
};
|
||||
|
||||
#define MAX_NUM_MASTERS 6 /* 5 prior to C620/Lewisburg PCH */
|
||||
struct ich_desc_master {
|
||||
union {
|
||||
uint32_t FLMSTRs[MAX_NUM_MASTERS]; /* Flash Masters */
|
||||
/* For pre-Skylake platforms */
|
||||
struct {
|
||||
uint32_t BIOS_req_ID :16,
|
||||
BIOS_descr_r :1,
|
||||
BIOS_BIOS_r :1,
|
||||
BIOS_ME_r :1,
|
||||
BIOS_GbE_r :1,
|
||||
BIOS_plat_r :1,
|
||||
:3,
|
||||
BIOS_descr_w :1,
|
||||
BIOS_BIOS_w :1,
|
||||
BIOS_ME_w :1,
|
||||
BIOS_GbE_w :1,
|
||||
BIOS_plat_w :1,
|
||||
:3;
|
||||
uint32_t ME_req_ID :16,
|
||||
ME_descr_r :1,
|
||||
ME_BIOS_r :1,
|
||||
ME_ME_r :1,
|
||||
ME_GbE_r :1,
|
||||
ME_plat_r :1,
|
||||
:3,
|
||||
ME_descr_w :1,
|
||||
ME_BIOS_w :1,
|
||||
ME_ME_w :1,
|
||||
ME_GbE_w :1,
|
||||
ME_plat_w :1,
|
||||
:3;
|
||||
uint32_t GbE_req_ID :16,
|
||||
GbE_descr_r :1,
|
||||
GbE_BIOS_r :1,
|
||||
GbE_ME_r :1,
|
||||
GbE_GbE_r :1,
|
||||
GbE_plat_r :1,
|
||||
:3,
|
||||
GbE_descr_w :1,
|
||||
GbE_BIOS_w :1,
|
||||
GbE_ME_w :1,
|
||||
GbE_GbE_w :1,
|
||||
GbE_plat_w :1,
|
||||
:3;
|
||||
};
|
||||
/* From Skylake on */
|
||||
struct {
|
||||
uint32_t ext_read :4,
|
||||
ext_write :4,
|
||||
read :12,
|
||||
write :12;
|
||||
} mstr[MAX_NUM_MASTERS];
|
||||
};
|
||||
};
|
||||
|
||||
struct ich_desc_north_strap {
|
||||
union {
|
||||
uint32_t STRPs[1]; /* current maximum: ich8 */
|
||||
struct { /* ich8 */
|
||||
struct { /* STRP2 (in the datasheet) */
|
||||
uint32_t MDB :1,
|
||||
:31;
|
||||
};
|
||||
} ich8;
|
||||
};
|
||||
};
|
||||
|
||||
struct ich_desc_south_strap {
|
||||
union {
|
||||
uint32_t STRPs[23]; /* current maximum: gemini lake */
|
||||
struct { /* ich8 */
|
||||
struct { /* STRP1 */
|
||||
uint32_t ME_DISABLE :1,
|
||||
:6,
|
||||
TCOMODE :1,
|
||||
ASD :7,
|
||||
BMCMODE :1,
|
||||
:3,
|
||||
GLAN_PCIE_SEL :1,
|
||||
GPIO12_SEL :2,
|
||||
SPICS1_LANPHYPC_SEL :1,
|
||||
MESM2SEL :1,
|
||||
:1,
|
||||
ASD2 :7;
|
||||
};
|
||||
} ich8;
|
||||
struct { /* ibex peak */
|
||||
struct { /* STRP0 */
|
||||
uint32_t :1,
|
||||
cs_ss2 :1,
|
||||
:5,
|
||||
SMB_EN :1,
|
||||
SML0_EN :1,
|
||||
SML1_EN :1,
|
||||
SML1FRQ :2,
|
||||
SMB0FRQ :2,
|
||||
SML0FRQ :2,
|
||||
:4,
|
||||
LANPHYPC_GP12_SEL :1,
|
||||
cs_ss1 :1,
|
||||
:2,
|
||||
DMI_REQID_DIS :1,
|
||||
:4,
|
||||
BBBS :2,
|
||||
:1;
|
||||
};
|
||||
struct { /* STRP1 */
|
||||
uint32_t cs_ss3 :4,
|
||||
:28;
|
||||
};
|
||||
struct { /* STRP2 */
|
||||
uint32_t :8,
|
||||
MESMASDEN :1,
|
||||
MESMASDA :7,
|
||||
:8,
|
||||
MESMI2CEN :1,
|
||||
MESMI2CA :7;
|
||||
};
|
||||
struct { /* STRP3 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP4 */
|
||||
uint32_t PHYCON :2,
|
||||
:6,
|
||||
GBEMAC_SMBUS_ADDR_EN :1,
|
||||
GBEMAC_SMBUS_ADDR :7,
|
||||
:1,
|
||||
GBEPHY_SMBUS_ADDR :7,
|
||||
:8;
|
||||
};
|
||||
struct { /* STRP5 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP6 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP7 */
|
||||
uint32_t MESMA2UDID_VENDOR :16,
|
||||
MESMA2UDID_DEVICE :16;
|
||||
};
|
||||
struct { /* STRP8 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP9 */
|
||||
uint32_t PCIEPCS1 :2,
|
||||
PCIEPCS2 :2,
|
||||
PCIELR1 :1,
|
||||
PCIELR2 :1,
|
||||
DMILR :1,
|
||||
:1,
|
||||
PHY_PCIEPORTSEL :3,
|
||||
PHY_PCIE_EN :1,
|
||||
:20;
|
||||
};
|
||||
struct { /* STRP10 */
|
||||
uint32_t :1,
|
||||
ME_BOOT_FLASH :1,
|
||||
cs_ss5 :1,
|
||||
VE_EN :1,
|
||||
:4,
|
||||
MMDDE :1,
|
||||
MMADDR :7,
|
||||
cs_ss7 :1,
|
||||
:1,
|
||||
ICC_SEL :3,
|
||||
MER_CL1 :1,
|
||||
:10;
|
||||
};
|
||||
struct { /* STRP11 */
|
||||
uint32_t SML1GPAEN :1,
|
||||
SML1GPA :7,
|
||||
:16,
|
||||
SML1I2CAEN :1,
|
||||
SML1I2CA :7;
|
||||
};
|
||||
struct { /* STRP12 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP13 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP14 */
|
||||
uint32_t :8,
|
||||
VE_EN2 :1,
|
||||
:5,
|
||||
VE_BOOT_FLASH :1,
|
||||
:1,
|
||||
BW_SSD :1,
|
||||
NVMHCI_EN :1,
|
||||
:14;
|
||||
};
|
||||
struct { /* STRP15 */
|
||||
uint32_t :3,
|
||||
cs_ss6 :2,
|
||||
:1,
|
||||
IWL_EN :1,
|
||||
:1,
|
||||
t209min :2,
|
||||
:22;
|
||||
};
|
||||
} ibex;
|
||||
struct { /* cougar point */
|
||||
struct { /* STRP0 */
|
||||
uint32_t :1,
|
||||
cs_ss1 :1,
|
||||
:5,
|
||||
SMB_EN :1,
|
||||
SML0_EN :1,
|
||||
SML1_EN :1,
|
||||
SML1FRQ :2,
|
||||
SMB0FRQ :2,
|
||||
SML0FRQ :2,
|
||||
:4,
|
||||
LANPHYPC_GP12_SEL :1,
|
||||
LINKSEC_DIS :1,
|
||||
:2,
|
||||
DMI_REQID_DIS :1,
|
||||
:4,
|
||||
BBBS :2,
|
||||
:1;
|
||||
};
|
||||
struct { /* STRP1 */
|
||||
uint32_t cs_ss3 :4,
|
||||
:4,
|
||||
cs_ss2 :1,
|
||||
:28;
|
||||
};
|
||||
struct { /* STRP2 */
|
||||
uint32_t :8,
|
||||
MESMASDEN :1,
|
||||
MESMASDA :7,
|
||||
MESMMCTPAEN :1,
|
||||
MESMMCTPA :7,
|
||||
MESMI2CEN :1,
|
||||
MESMI2CA :7;
|
||||
};
|
||||
struct { /* STRP3 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP4 */
|
||||
uint32_t PHYCON :2,
|
||||
:6,
|
||||
GBEMAC_SMBUS_ADDR_EN :1,
|
||||
GBEMAC_SMBUS_ADDR :7,
|
||||
:1,
|
||||
GBEPHY_SMBUS_ADDR :7,
|
||||
:8;
|
||||
};
|
||||
struct { /* STRP5 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP6 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP7 */
|
||||
uint32_t MESMA2UDID_VENDOR :16,
|
||||
MESMA2UDID_DEVICE :16;
|
||||
};
|
||||
struct { /* STRP8 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP9 */
|
||||
uint32_t PCIEPCS1 :2,
|
||||
PCIEPCS2 :2,
|
||||
PCIELR1 :1,
|
||||
PCIELR2 :1,
|
||||
DMILR :1,
|
||||
cs_ss4 :1,
|
||||
PHY_PCIEPORTSEL :3,
|
||||
PHY_PCIE_EN :1,
|
||||
:2,
|
||||
SUB_DECODE_EN :1,
|
||||
:7,
|
||||
PCHHOT_SML1ALERT_SEL :1,
|
||||
:9;
|
||||
};
|
||||
struct { /* STRP10 */
|
||||
uint32_t :1,
|
||||
ME_BOOT_FLASH :1,
|
||||
:6,
|
||||
MDSMBE_EN :1,
|
||||
MDSMBE_ADD :7,
|
||||
:2,
|
||||
ICC_SEL :3,
|
||||
MER_CL1 :1,
|
||||
ICC_PRO_SEL :1,
|
||||
Deep_SX_EN :1,
|
||||
ME_DBG_LAN :1,
|
||||
:7;
|
||||
};
|
||||
struct { /* STRP11 */
|
||||
uint32_t SML1GPAEN :1,
|
||||
SML1GPA :7,
|
||||
:16,
|
||||
SML1I2CAEN :1,
|
||||
SML1I2CA :7;
|
||||
};
|
||||
struct { /* STRP12 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP13 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP14 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP15 */
|
||||
uint32_t cs_ss6 :6,
|
||||
IWL_EN :1,
|
||||
cs_ss5 :2,
|
||||
:4,
|
||||
SMLINK1_THERM_SEL :1,
|
||||
SLP_LAN_GP29_SEL :1,
|
||||
:16;
|
||||
};
|
||||
struct { /* STRP16 */
|
||||
uint32_t :32;
|
||||
};
|
||||
struct { /* STRP17 */
|
||||
uint32_t ICML :1,
|
||||
cs_ss7 :1,
|
||||
:30;
|
||||
};
|
||||
} cougar;
|
||||
};
|
||||
};
|
||||
|
||||
struct ich_desc_upper_map {
|
||||
union {
|
||||
uint32_t FLUMAP1; /* Flash Upper Map 1 */
|
||||
struct {
|
||||
uint32_t VTBA :8, /* ME VSCC Table Base Address */
|
||||
VTL :8, /* ME VSCC Table Length */
|
||||
:8,
|
||||
MDTBA :8; /* MIP Descr. Table Base Addr. (new since Cannon Point/300) */
|
||||
};
|
||||
};
|
||||
struct {
|
||||
union { /* JEDEC-ID Register */
|
||||
uint32_t JID;
|
||||
struct {
|
||||
uint32_t vid :8, /* Vendor ID */
|
||||
cid0 :8, /* Component ID 0 */
|
||||
cid1 :8, /* Component ID 1 */
|
||||
:8;
|
||||
};
|
||||
};
|
||||
union { /* Vendor Specific Component Capabilities */
|
||||
uint32_t VSCC;
|
||||
struct {
|
||||
uint32_t ubes :2, /* Upper Block/Sector Erase Size */
|
||||
uwg :1, /* Upper Write Granularity */
|
||||
uwsr :1, /* Upper Write Status Required */
|
||||
uwews :1, /* Upper Write Enable on Write Status */
|
||||
:3,
|
||||
ueo :8, /* Upper Erase Opcode */
|
||||
lbes :2, /* Lower Block/Sector Erase Size */
|
||||
lwg :1, /* Lower Write Granularity */
|
||||
lwsr :1, /* Lower Write Status Required */
|
||||
lwews :1, /* Lower Write Enable on Write Status */
|
||||
:3,
|
||||
leo :16; /* Lower Erase Opcode */
|
||||
};
|
||||
};
|
||||
} vscc_table[128];
|
||||
};
|
||||
|
||||
struct ich_descriptors {
|
||||
struct ich_desc_content content;
|
||||
struct ich_desc_component component;
|
||||
struct ich_desc_region region;
|
||||
struct ich_desc_master master;
|
||||
struct ich_desc_north_strap north;
|
||||
struct ich_desc_south_strap south;
|
||||
struct ich_desc_upper_map upper;
|
||||
};
|
||||
|
||||
ssize_t ich_number_of_regions(enum ich_chipset cs, const struct ich_desc_content *content);
|
||||
ssize_t ich_number_of_masters(enum ich_chipset cs, const struct ich_desc_content *content);
|
||||
|
||||
void prettyprint_ich_chipset(enum ich_chipset cs);
|
||||
void prettyprint_ich_descriptors(enum ich_chipset cs, const struct ich_descriptors *desc);
|
||||
|
||||
void prettyprint_ich_descriptor_content(enum ich_chipset cs, const struct ich_desc_content *content);
|
||||
void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_descriptors *desc);
|
||||
void prettyprint_ich_descriptor_region(enum ich_chipset cs, const struct ich_descriptors *desc);
|
||||
void prettyprint_ich_descriptor_master(enum ich_chipset cs, const struct ich_descriptors *desc);
|
||||
|
||||
void prettyprint_ich_descriptor_upper_map(const struct ich_desc_upper_map *umap);
|
||||
void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_descriptors *desc);
|
||||
int read_ich_descriptors_from_dump(const uint32_t *dump, size_t len, enum ich_chipset *cs, struct ich_descriptors *desc);
|
||||
|
||||
int read_ich_descriptors_via_fdo(enum ich_chipset cs, void *spibar, struct ich_descriptors *desc);
|
||||
int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors *desc, uint8_t idx);
|
||||
|
||||
int layout_from_ich_descriptors(struct flashrom_layout **, const void *dump, size_t len);
|
||||
|
||||
#endif /* __ICH_DESCRIPTORS_H__ */
|
||||
69
include/layout.h
Normal file
69
include/layout.h
Normal file
@ -0,0 +1,69 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2005-2008 coresystems GmbH
|
||||
* (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
|
||||
* Copyright (C) 2011-2013 Stefan Tauner
|
||||
* Copyright (C) 2016 secunet Security Networks AG
|
||||
* (Written by Nico Huber <nico.huber@secunet.com> for secunet)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __LAYOUT_H__
|
||||
#define __LAYOUT_H__ 1
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/* Types and macros regarding the maximum flash space size supported by generic code. */
|
||||
typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */
|
||||
typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */
|
||||
#define FL_MAX_CHIPOFF_BITS (24)
|
||||
#define FL_MAX_CHIPOFF ((chipoff_t)(1ULL<<FL_MAX_CHIPOFF_BITS)-1)
|
||||
#define PRIxCHIPOFF "06"PRIx32
|
||||
#define PRIuCHIPSIZE PRIu32
|
||||
|
||||
#define MAX_ROMLAYOUT 128
|
||||
|
||||
struct romentry {
|
||||
struct romentry *next;
|
||||
|
||||
chipoff_t start;
|
||||
chipoff_t end;
|
||||
bool included;
|
||||
char *name;
|
||||
char *file;
|
||||
};
|
||||
|
||||
struct flashrom_layout;
|
||||
|
||||
struct layout_include_args;
|
||||
|
||||
struct flashrom_flashctx;
|
||||
const struct flashrom_layout *get_default_layout(const struct flashrom_flashctx *);
|
||||
const struct flashrom_layout *get_layout(const struct flashrom_flashctx *);
|
||||
|
||||
int layout_from_file(struct flashrom_layout **, const char *name);
|
||||
|
||||
int register_include_arg(struct layout_include_args **, const char *arg);
|
||||
int process_include_args(struct flashrom_layout *, const struct layout_include_args *);
|
||||
void cleanup_include_args(struct layout_include_args **);
|
||||
|
||||
const struct romentry *layout_next_included_region(const struct flashrom_layout *, chipoff_t);
|
||||
const struct romentry *layout_next_included(const struct flashrom_layout *, const struct romentry *);
|
||||
const struct romentry *layout_next(const struct flashrom_layout *, const struct romentry *);
|
||||
int included_regions_overlap(const struct flashrom_layout *);
|
||||
void prepare_layout_for_extraction(struct flashrom_flashctx *);
|
||||
int layout_sanity_checks(const struct flashrom_flashctx *);
|
||||
|
||||
#endif /* !__LAYOUT_H__ */
|
||||
160
include/libflashrom.h
Normal file
160
include/libflashrom.h
Normal file
@ -0,0 +1,160 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2010 Google Inc.
|
||||
* Copyright (C) 2012 secunet Security Networks AG
|
||||
* (Written by Nico Huber <nico.huber@secunet.com> for secunet)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __LIBFLASHROM_H__
|
||||
#define __LIBFLASHROM_H__ 1
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stddef.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdarg.h>
|
||||
|
||||
int flashrom_init(int perform_selfcheck);
|
||||
int flashrom_shutdown(void);
|
||||
/** @ingroup flashrom-general */
|
||||
enum flashrom_log_level {
|
||||
FLASHROM_MSG_ERROR = 0,
|
||||
FLASHROM_MSG_WARN = 1,
|
||||
FLASHROM_MSG_INFO = 2,
|
||||
FLASHROM_MSG_DEBUG = 3,
|
||||
FLASHROM_MSG_DEBUG2 = 4,
|
||||
FLASHROM_MSG_SPEW = 5,
|
||||
};
|
||||
/** @ingroup flashrom-general */
|
||||
typedef int(flashrom_log_callback)(enum flashrom_log_level, const char *format, va_list);
|
||||
void flashrom_set_log_callback(flashrom_log_callback *);
|
||||
|
||||
/** @ingroup flashrom-query */
|
||||
enum flashrom_test_state {
|
||||
FLASHROM_TESTED_OK = 0,
|
||||
FLASHROM_TESTED_NT = 1,
|
||||
FLASHROM_TESTED_BAD = 2,
|
||||
FLASHROM_TESTED_DEP = 3,
|
||||
FLASHROM_TESTED_NA = 4,
|
||||
};
|
||||
|
||||
struct flashrom_flashchip_info {
|
||||
const char *vendor;
|
||||
const char *name;
|
||||
unsigned int total_size;
|
||||
struct flashrom_tested {
|
||||
enum flashrom_test_state probe;
|
||||
enum flashrom_test_state read;
|
||||
enum flashrom_test_state erase;
|
||||
enum flashrom_test_state write;
|
||||
} tested;
|
||||
};
|
||||
|
||||
struct flashrom_board_info {
|
||||
const char *vendor;
|
||||
const char *name;
|
||||
enum flashrom_test_state working;
|
||||
};
|
||||
|
||||
struct flashrom_chipset_info {
|
||||
const char *vendor;
|
||||
const char *chipset;
|
||||
uint16_t vendor_id;
|
||||
uint16_t chipset_id;
|
||||
enum flashrom_test_state status;
|
||||
};
|
||||
|
||||
const char *flashrom_version_info(void);
|
||||
struct flashrom_flashchip_info *flashrom_supported_flash_chips(void);
|
||||
struct flashrom_board_info *flashrom_supported_boards(void);
|
||||
struct flashrom_chipset_info *flashrom_supported_chipsets(void);
|
||||
int flashrom_data_free(void *const p);
|
||||
|
||||
/** @ingroup flashrom-prog */
|
||||
struct flashrom_programmer;
|
||||
int flashrom_programmer_init(struct flashrom_programmer **, const char *prog_name, const char *prog_params);
|
||||
int flashrom_programmer_shutdown(struct flashrom_programmer *);
|
||||
|
||||
struct flashrom_flashctx;
|
||||
int flashrom_flash_probe(struct flashrom_flashctx **, const struct flashrom_programmer *, const char *chip_name);
|
||||
size_t flashrom_flash_getsize(const struct flashrom_flashctx *);
|
||||
int flashrom_flash_erase(struct flashrom_flashctx *);
|
||||
void flashrom_flash_release(struct flashrom_flashctx *);
|
||||
|
||||
/** @ingroup flashrom-flash */
|
||||
enum flashrom_flag {
|
||||
FLASHROM_FLAG_FORCE,
|
||||
FLASHROM_FLAG_FORCE_BOARDMISMATCH,
|
||||
FLASHROM_FLAG_VERIFY_AFTER_WRITE,
|
||||
FLASHROM_FLAG_VERIFY_WHOLE_CHIP,
|
||||
};
|
||||
void flashrom_flag_set(struct flashrom_flashctx *, enum flashrom_flag, bool value);
|
||||
bool flashrom_flag_get(const struct flashrom_flashctx *, enum flashrom_flag);
|
||||
|
||||
int flashrom_image_read(struct flashrom_flashctx *, void *buffer, size_t buffer_len);
|
||||
int flashrom_image_write(struct flashrom_flashctx *, void *buffer, size_t buffer_len, const void *refbuffer);
|
||||
int flashrom_image_verify(struct flashrom_flashctx *, const void *buffer, size_t buffer_len);
|
||||
|
||||
struct flashrom_layout;
|
||||
int flashrom_layout_new(struct flashrom_layout **);
|
||||
int flashrom_layout_read_from_ifd(struct flashrom_layout **, struct flashrom_flashctx *, const void *dump, size_t len);
|
||||
int flashrom_layout_read_fmap_from_rom(struct flashrom_layout **,
|
||||
struct flashrom_flashctx *, size_t offset, size_t length);
|
||||
int flashrom_layout_read_fmap_from_buffer(struct flashrom_layout **layout,
|
||||
struct flashrom_flashctx *, const uint8_t *buf, size_t len);
|
||||
int flashrom_layout_add_region(struct flashrom_layout *, size_t start, size_t end, const char *name);
|
||||
int flashrom_layout_include_region(struct flashrom_layout *, const char *name);
|
||||
int flashrom_layout_get_region_range(struct flashrom_layout *, const char *name,
|
||||
unsigned int *start, unsigned int *len);
|
||||
void flashrom_layout_release(struct flashrom_layout *);
|
||||
void flashrom_layout_set(struct flashrom_flashctx *, const struct flashrom_layout *);
|
||||
|
||||
/** @ingroup flashrom-wp */
|
||||
enum flashrom_wp_result {
|
||||
FLASHROM_WP_OK = 0,
|
||||
FLASHROM_WP_ERR_CHIP_UNSUPPORTED = 1,
|
||||
FLASHROM_WP_ERR_OTHER = 2,
|
||||
FLASHROM_WP_ERR_READ_FAILED = 3,
|
||||
FLASHROM_WP_ERR_WRITE_FAILED = 4,
|
||||
FLASHROM_WP_ERR_VERIFY_FAILED = 5,
|
||||
FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6,
|
||||
FLASHROM_WP_ERR_MODE_UNSUPPORTED = 7,
|
||||
FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8
|
||||
};
|
||||
|
||||
enum flashrom_wp_mode {
|
||||
FLASHROM_WP_MODE_DISABLED,
|
||||
FLASHROM_WP_MODE_HARDWARE,
|
||||
FLASHROM_WP_MODE_POWER_CYCLE,
|
||||
FLASHROM_WP_MODE_PERMANENT
|
||||
};
|
||||
struct flashrom_wp_cfg;
|
||||
struct flashrom_wp_ranges;
|
||||
|
||||
enum flashrom_wp_result flashrom_wp_cfg_new(struct flashrom_wp_cfg **);
|
||||
void flashrom_wp_cfg_release(struct flashrom_wp_cfg *);
|
||||
void flashrom_wp_set_mode(struct flashrom_wp_cfg *, enum flashrom_wp_mode);
|
||||
enum flashrom_wp_mode flashrom_wp_get_mode(const struct flashrom_wp_cfg *);
|
||||
void flashrom_wp_set_range(struct flashrom_wp_cfg *, size_t start, size_t len);
|
||||
void flashrom_wp_get_range(size_t *start, size_t *len, const struct flashrom_wp_cfg *);
|
||||
|
||||
enum flashrom_wp_result flashrom_wp_read_cfg(struct flashrom_wp_cfg *, struct flashrom_flashctx *);
|
||||
enum flashrom_wp_result flashrom_wp_write_cfg(struct flashrom_flashctx *, const struct flashrom_wp_cfg *);
|
||||
|
||||
enum flashrom_wp_result flashrom_wp_get_available_ranges(struct flashrom_wp_ranges **, struct flashrom_flashctx *);
|
||||
size_t flashrom_wp_ranges_get_count(const struct flashrom_wp_ranges *);
|
||||
enum flashrom_wp_result flashrom_wp_ranges_get_range(size_t *start, size_t *len, const struct flashrom_wp_ranges *, unsigned int index);
|
||||
void flashrom_wp_ranges_release(struct flashrom_wp_ranges *);
|
||||
|
||||
#endif /* !__LIBFLASHROM_H__ */
|
||||
117
include/platform.h
Normal file
117
include/platform.h
Normal file
@ -0,0 +1,117 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2009 Carl-Daniel Hailfinger
|
||||
* Copyright (C) 2022 secunet Security Networks AG
|
||||
* (written by Thomas Heijligen <thomas.heijligen@secunet.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Header file for platform abstraction.
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_H__
|
||||
#define __PLATFORM_H__ 1
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/* swap bytes */
|
||||
/* OpenBSD has conflicting definitions for swapX and __swapX */
|
||||
static inline uint8_t ___swap8(const uint8_t value)
|
||||
{
|
||||
return (value & (uint8_t)0xffU);
|
||||
}
|
||||
|
||||
static inline uint16_t ___swap16(const uint16_t value)
|
||||
{
|
||||
return ((value & (uint16_t)0x00ffU) << 8) |
|
||||
((value & (uint16_t)0xff00U) >> 8);
|
||||
}
|
||||
|
||||
static inline uint32_t ___swap32(const uint32_t value)
|
||||
{
|
||||
return ((value & (uint32_t)0x000000ffUL) << 24) |
|
||||
((value & (uint32_t)0x0000ff00UL) << 8) |
|
||||
((value & (uint32_t)0x00ff0000UL) >> 8) |
|
||||
((value & (uint32_t)0xff000000UL) >> 24);
|
||||
}
|
||||
|
||||
static inline uint64_t ___swap64(const uint64_t value)
|
||||
{
|
||||
return ((value & (uint64_t)0x00000000000000ffULL) << 56) |
|
||||
((value & (uint64_t)0x000000000000ff00ULL) << 40) |
|
||||
((value & (uint64_t)0x0000000000ff0000ULL) << 24) |
|
||||
((value & (uint64_t)0x00000000ff000000ULL) << 8) |
|
||||
((value & (uint64_t)0x000000ff00000000ULL) >> 8) |
|
||||
((value & (uint64_t)0x0000ff0000000000ULL) >> 24) |
|
||||
((value & (uint64_t)0x00ff000000000000ULL) >> 40) |
|
||||
((value & (uint64_t)0xff00000000000000ULL) >> 56);
|
||||
}
|
||||
|
||||
/*
|
||||
* macro to return the same value as passed.
|
||||
*
|
||||
* `___return_same(cpu_to_le, 8)`
|
||||
* expands to
|
||||
* `uint8_t cpu_to_le8 (const uint8_t value) { return value; }`
|
||||
*/
|
||||
#define ___return_same(name, bits) \
|
||||
uint##bits##_t name##bits (const uint##bits##_t value) { return value; }
|
||||
|
||||
/*
|
||||
* macro to return the swapped value as passed.
|
||||
*
|
||||
* `___return_swapped(cpu_to_be, 8)`
|
||||
* expands to
|
||||
* `uint8_t cpu_to_be8 (const uint8_t value) { return ___swap8 (value); }`
|
||||
*/
|
||||
#define ___return_swapped(name, bits) \
|
||||
uint##bits##_t name##bits (const uint##bits##_t value) { return ___swap##bits (value); }
|
||||
|
||||
/* convert cpu native endian to little endian */
|
||||
uint8_t cpu_to_le8 (uint8_t value);
|
||||
uint16_t cpu_to_le16(uint16_t value);
|
||||
uint32_t cpu_to_le32(uint32_t value);
|
||||
uint64_t cpu_to_le64(uint64_t value);
|
||||
|
||||
/* convert cpu native endian to big endian */
|
||||
uint8_t cpu_to_be8 (uint8_t value);
|
||||
uint16_t cpu_to_be16(uint16_t value);
|
||||
uint32_t cpu_to_be32(uint32_t value);
|
||||
uint64_t cpu_to_be64(uint64_t value);
|
||||
|
||||
/* convert little endian to cpu native endian */
|
||||
uint8_t le_to_cpu8 (uint8_t value);
|
||||
uint16_t le_to_cpu16(uint16_t value);
|
||||
uint32_t le_to_cpu32(uint32_t value);
|
||||
uint64_t le_to_cpu64(uint64_t value);
|
||||
|
||||
/* convert big endian to cpu native endian */
|
||||
uint8_t be_to_cpu8 (uint8_t value);
|
||||
uint16_t be_to_cpu16(uint16_t value);
|
||||
uint32_t be_to_cpu32(uint32_t value);
|
||||
uint64_t be_to_cpu64(uint64_t value);
|
||||
|
||||
/* read value from base at offset in little endian */
|
||||
uint8_t read_le8 (const void *base, size_t offset);
|
||||
uint16_t read_le16(const void *base, size_t offset);
|
||||
uint32_t read_le32(const void *base, size_t offset);
|
||||
uint64_t read_le64(const void *base, size_t offset);
|
||||
|
||||
/* read value from base at offset in big endian */
|
||||
uint8_t read_be8 (const void *base, size_t offset);
|
||||
uint16_t read_be16(const void *base, size_t offset);
|
||||
uint32_t read_be32(const void *base, size_t offset);
|
||||
uint64_t read_be64(const void *base, size_t offset);
|
||||
|
||||
#endif /* !__PLATFORM_H__ */
|
||||
25
include/platform/pci.h
Normal file
25
include/platform/pci.h
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* This is a wrapper for libpci.
|
||||
* ...
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __PLATFORM_PCI_H__
|
||||
#define __PLATFORM_PCI_H__
|
||||
|
||||
/*
|
||||
* An old libpci version seems to use the variable name "index" which triggers
|
||||
* shadowing warnings on systems which have the index() function in a default
|
||||
* #include or as builtin.
|
||||
*/
|
||||
#define index shadow_workaround_index
|
||||
|
||||
#if defined (__NetBSD__)
|
||||
#include <pci.h>
|
||||
#else
|
||||
#include <pci/pci.h>
|
||||
#endif
|
||||
|
||||
#undef index
|
||||
|
||||
#endif /* __PLATFORM_PCI_H__ */
|
||||
516
include/programmer.h
Normal file
516
include/programmer.h
Normal file
@ -0,0 +1,516 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2000 Silicon Integrated System Corporation
|
||||
* Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
|
||||
* Copyright (C) 2005-2009 coresystems GmbH
|
||||
* Copyright (C) 2006-2009 Carl-Daniel Hailfinger
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __PROGRAMMER_H__
|
||||
#define __PROGRAMMER_H__ 1
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "flash.h" /* for chipaddr and flashctx */
|
||||
|
||||
enum programmer_type {
|
||||
PCI = 1, /* to detect uninitialized values */
|
||||
USB,
|
||||
OTHER,
|
||||
};
|
||||
|
||||
struct dev_entry {
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
const enum test_state status;
|
||||
const char *vendor_name;
|
||||
const char *device_name;
|
||||
};
|
||||
|
||||
struct programmer_entry {
|
||||
const char *name;
|
||||
const enum programmer_type type;
|
||||
union {
|
||||
const struct dev_entry *const dev;
|
||||
const char *const note;
|
||||
} devs;
|
||||
|
||||
int (*init) (void);
|
||||
|
||||
void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void (*unmap_flash_region) (void *virt_addr, size_t len);
|
||||
|
||||
void (*delay) (unsigned int usecs);
|
||||
};
|
||||
|
||||
extern const struct programmer_entry *const programmer_table[];
|
||||
extern const size_t programmer_table_size;
|
||||
|
||||
/* programmer drivers */
|
||||
extern const struct programmer_entry programmer_atahpt;
|
||||
extern const struct programmer_entry programmer_atapromise;
|
||||
extern const struct programmer_entry programmer_atavia;
|
||||
extern const struct programmer_entry programmer_buspirate_spi;
|
||||
extern const struct programmer_entry programmer_ch341a_spi;
|
||||
extern const struct programmer_entry programmer_dediprog;
|
||||
extern const struct programmer_entry programmer_developerbox;
|
||||
extern const struct programmer_entry programmer_digilent_spi;
|
||||
extern const struct programmer_entry programmer_drkaiser;
|
||||
extern const struct programmer_entry programmer_dummy;
|
||||
extern const struct programmer_entry programmer_ft2232_spi;
|
||||
extern const struct programmer_entry programmer_gfxnvidia;
|
||||
extern const struct programmer_entry programmer_internal;
|
||||
extern const struct programmer_entry programmer_it8212;
|
||||
extern const struct programmer_entry programmer_jlink_spi;
|
||||
extern const struct programmer_entry programmer_linux_mtd;
|
||||
extern const struct programmer_entry programmer_linux_spi;
|
||||
extern const struct programmer_entry programmer_lspcon_i2c_spi;
|
||||
extern const struct programmer_entry programmer_mediatek_i2c_spi;
|
||||
extern const struct programmer_entry programmer_mstarddc_spi;
|
||||
extern const struct programmer_entry programmer_ni845x_spi;
|
||||
extern const struct programmer_entry programmer_nic3com;
|
||||
extern const struct programmer_entry programmer_nicintel;
|
||||
extern const struct programmer_entry programmer_nicintel_eeprom;
|
||||
extern const struct programmer_entry programmer_nicintel_spi;
|
||||
extern const struct programmer_entry programmer_nicnatsemi;
|
||||
extern const struct programmer_entry programmer_nicrealtek;
|
||||
extern const struct programmer_entry programmer_ogp_spi;
|
||||
extern const struct programmer_entry programmer_pickit2_spi;
|
||||
extern const struct programmer_entry programmer_pony_spi;
|
||||
extern const struct programmer_entry programmer_raiden_debug_spi;
|
||||
extern const struct programmer_entry programmer_rayer_spi;
|
||||
extern const struct programmer_entry programmer_realtek_mst_i2c_spi;
|
||||
extern const struct programmer_entry programmer_satamv;
|
||||
extern const struct programmer_entry programmer_satasii;
|
||||
extern const struct programmer_entry programmer_serprog;
|
||||
extern const struct programmer_entry programmer_stlinkv3_spi;
|
||||
extern const struct programmer_entry programmer_usbblaster_spi;
|
||||
|
||||
int programmer_init(const struct programmer_entry *prog, const char *param);
|
||||
int programmer_shutdown(void);
|
||||
|
||||
struct bitbang_spi_master {
|
||||
/* Note that CS# is active low, so val=0 means the chip is active. */
|
||||
void (*set_cs) (int val, void *spi_data);
|
||||
void (*set_sck) (int val, void *spi_data);
|
||||
void (*set_mosi) (int val, void *spi_data);
|
||||
int (*get_miso) (void *spi_data);
|
||||
void (*request_bus) (void *spi_data);
|
||||
void (*release_bus) (void *spi_data);
|
||||
/* optional functions to optimize xfers */
|
||||
void (*set_sck_set_mosi) (int sck, int mosi, void *spi_data);
|
||||
int (*set_sck_get_miso) (int sck, void *spi_data);
|
||||
/* Length of half a clock period in usecs. */
|
||||
unsigned int half_period;
|
||||
};
|
||||
|
||||
struct pci_dev;
|
||||
struct pci_filter;
|
||||
|
||||
/* pcidev.c */
|
||||
// FIXME: This needs to be local, not global(?)
|
||||
extern struct pci_access *pacc;
|
||||
int pci_init_common(void);
|
||||
uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
|
||||
struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
|
||||
struct pci_dev *pcidev_scandev(struct pci_filter *filter, struct pci_dev *start);
|
||||
struct pci_dev *pcidev_getdevfn(struct pci_dev *dev, const int func);
|
||||
struct pci_dev *pcidev_find_vendorclass(uint16_t vendor, uint16_t devclass);
|
||||
struct pci_dev *pcidev_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device);
|
||||
struct pci_dev *pcidev_find(uint16_t vendor, uint16_t device);
|
||||
/* rpci_write_* are reversible writes. The original PCI config space register
|
||||
* contents will be restored on shutdown.
|
||||
* To clone the pci_dev instances internally, the `pacc` global
|
||||
* variable has to reference a pci_access method that is compatible
|
||||
* with the given pci_dev handle. The referenced pci_access (not
|
||||
* the variable) has to stay valid until the shutdown handlers are
|
||||
* finished.
|
||||
*/
|
||||
int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
|
||||
int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
|
||||
int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
|
||||
|
||||
#if CONFIG_INTERNAL == 1
|
||||
struct penable {
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
enum chipbustype buses;
|
||||
const enum test_state status;
|
||||
const char *vendor_name;
|
||||
const char *device_name;
|
||||
int (*doit) (struct pci_dev *dev, const char *name);
|
||||
};
|
||||
|
||||
extern const struct penable chipset_enables[];
|
||||
|
||||
enum board_match_phase {
|
||||
P1,
|
||||
P2,
|
||||
P3
|
||||
};
|
||||
|
||||
struct board_match {
|
||||
/* Any device, but make it sensible, like the ISA bridge. */
|
||||
uint16_t first_vendor;
|
||||
uint16_t first_device;
|
||||
uint16_t first_card_vendor;
|
||||
uint16_t first_card_device;
|
||||
|
||||
/* Any device, but make it sensible, like
|
||||
* the host bridge. May be NULL.
|
||||
*/
|
||||
uint16_t second_vendor;
|
||||
uint16_t second_device;
|
||||
uint16_t second_card_vendor;
|
||||
uint16_t second_card_device;
|
||||
|
||||
/* Pattern to match DMI entries. May be NULL. */
|
||||
const char *dmi_pattern;
|
||||
|
||||
/* The vendor / part name from the coreboot table. May be NULL. */
|
||||
const char *lb_vendor;
|
||||
const char *lb_part;
|
||||
|
||||
enum board_match_phase phase;
|
||||
|
||||
const char *vendor_name;
|
||||
const char *board_name;
|
||||
|
||||
int max_rom_decode_parallel;
|
||||
const enum test_state status;
|
||||
int (*enable) (void); /* May be NULL. */
|
||||
};
|
||||
|
||||
extern const struct board_match board_matches[];
|
||||
|
||||
struct board_info {
|
||||
const char *vendor;
|
||||
const char *name;
|
||||
const enum test_state working;
|
||||
#ifdef CONFIG_PRINT_WIKI
|
||||
const char *url;
|
||||
const char *note;
|
||||
#endif
|
||||
};
|
||||
|
||||
extern const struct board_info boards_known[];
|
||||
extern const struct board_info laptops_known[];
|
||||
#endif
|
||||
|
||||
/* udelay.c */
|
||||
void myusec_delay(unsigned int usecs);
|
||||
void myusec_calibrate_delay(void);
|
||||
void internal_sleep(unsigned int usecs);
|
||||
void internal_delay(unsigned int usecs);
|
||||
|
||||
#if CONFIG_INTERNAL == 1
|
||||
/* board_enable.c */
|
||||
int selfcheck_board_enables(void);
|
||||
int board_parse_parameter(const char *boardstring, char **vendor, char **model);
|
||||
void w836xx_ext_enter(uint16_t port);
|
||||
void w836xx_ext_leave(uint16_t port);
|
||||
void probe_superio_winbond(void);
|
||||
int it8705f_write_enable(uint8_t port);
|
||||
uint8_t sio_read(uint16_t port, uint8_t reg);
|
||||
void sio_write(uint16_t port, uint8_t reg, uint8_t data);
|
||||
void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
|
||||
void board_handle_before_superio(void);
|
||||
void board_handle_before_laptop(void);
|
||||
int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
|
||||
|
||||
/* chipset_enable.c */
|
||||
int chipset_flash_enable(void);
|
||||
|
||||
/* processor_enable.c */
|
||||
int processor_flash_enable(void);
|
||||
#endif
|
||||
|
||||
#if CONFIG_INTERNAL == 1
|
||||
/* cbtable.c */
|
||||
int cb_parse_table(const char **vendor, const char **model);
|
||||
int cb_check_image(const uint8_t *bios, unsigned int size);
|
||||
|
||||
/* dmi.c */
|
||||
#if defined(__i386__) || defined(__x86_64__)
|
||||
void dmi_init(void);
|
||||
bool dmi_is_supported(void);
|
||||
int dmi_match(const char *pattern);
|
||||
#endif // defined(__i386__) || defined(__x86_64__)
|
||||
|
||||
/* internal.c */
|
||||
struct superio {
|
||||
uint16_t vendor;
|
||||
uint16_t port;
|
||||
uint16_t model;
|
||||
};
|
||||
extern struct superio superios[];
|
||||
extern int superio_count;
|
||||
#define SUPERIO_VENDOR_NONE 0x0
|
||||
#define SUPERIO_VENDOR_ITE 0x1
|
||||
#define SUPERIO_VENDOR_WINBOND 0x2
|
||||
#endif
|
||||
|
||||
#if CONFIG_INTERNAL == 1
|
||||
extern int is_laptop;
|
||||
extern int laptop_ok;
|
||||
extern int force_boardenable;
|
||||
extern int force_boardmismatch;
|
||||
void probe_superio(void);
|
||||
int register_superio(struct superio s);
|
||||
extern enum chipbustype internal_buses_supported;
|
||||
#endif
|
||||
|
||||
/* bitbang_spi.c */
|
||||
int register_spi_bitbang_master(const struct bitbang_spi_master *master, void *spi_data);
|
||||
|
||||
|
||||
/* flashrom.c */
|
||||
struct decode_sizes {
|
||||
uint32_t parallel;
|
||||
uint32_t lpc;
|
||||
uint32_t fwh;
|
||||
uint32_t spi;
|
||||
};
|
||||
// FIXME: These need to be local, not global
|
||||
extern struct decode_sizes max_rom_decode;
|
||||
extern int programmer_may_write;
|
||||
extern unsigned long flashbase;
|
||||
unsigned int count_max_decode_exceedings(const struct flashctx *flash);
|
||||
char *extract_programmer_param(const char *param_name);
|
||||
|
||||
/* spi.c */
|
||||
#define MAX_DATA_UNSPECIFIED 0
|
||||
#define MAX_DATA_READ_UNLIMITED 64 * 1024
|
||||
#define MAX_DATA_WRITE_UNLIMITED 256
|
||||
|
||||
#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
|
||||
#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address
|
||||
register, 4BA mode switch) don't work */
|
||||
|
||||
struct spi_master {
|
||||
uint32_t features;
|
||||
unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
|
||||
unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
|
||||
int (*command)(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
|
||||
const unsigned char *writearr, unsigned char *readarr);
|
||||
int (*multicommand)(const struct flashctx *flash, struct spi_command *cmds);
|
||||
|
||||
/* Optimized functions for this master */
|
||||
int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*shutdown)(void *data);
|
||||
void *data;
|
||||
};
|
||||
|
||||
int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
|
||||
const unsigned char *writearr, unsigned char *readarr);
|
||||
int default_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
|
||||
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int register_spi_master(const struct spi_master *mst, void *data);
|
||||
|
||||
/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
|
||||
enum ich_chipset {
|
||||
CHIPSET_ICH_UNKNOWN,
|
||||
CHIPSET_ICH,
|
||||
CHIPSET_ICH2345,
|
||||
CHIPSET_ICH6,
|
||||
CHIPSET_POULSBO, /* SCH U* */
|
||||
CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
|
||||
CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
|
||||
CHIPSET_ICH7,
|
||||
CHIPSET_ICH8,
|
||||
CHIPSET_ICH9,
|
||||
CHIPSET_ICH10,
|
||||
CHIPSET_5_SERIES_IBEX_PEAK,
|
||||
CHIPSET_6_SERIES_COUGAR_POINT,
|
||||
CHIPSET_7_SERIES_PANTHER_POINT,
|
||||
CHIPSET_8_SERIES_LYNX_POINT,
|
||||
CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
|
||||
CHIPSET_8_SERIES_LYNX_POINT_LP,
|
||||
CHIPSET_8_SERIES_WELLSBURG,
|
||||
CHIPSET_9_SERIES_WILDCAT_POINT,
|
||||
CHIPSET_9_SERIES_WILDCAT_POINT_LP,
|
||||
CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
|
||||
CHIPSET_C620_SERIES_LEWISBURG,
|
||||
CHIPSET_300_SERIES_CANNON_POINT,
|
||||
CHIPSET_400_SERIES_COMET_POINT,
|
||||
CHIPSET_500_SERIES_TIGER_POINT,
|
||||
CHIPSET_600_SERIES_ALDER_POINT,
|
||||
CHIPSET_METEOR_LAKE,
|
||||
CHIPSET_APOLLO_LAKE,
|
||||
CHIPSET_GEMINI_LAKE,
|
||||
CHIPSET_JASPER_LAKE,
|
||||
CHIPSET_ELKHART_LAKE,
|
||||
};
|
||||
|
||||
/* ichspi.c */
|
||||
#if CONFIG_INTERNAL == 1
|
||||
int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
|
||||
int via_init_spi(uint32_t mmio_base);
|
||||
|
||||
/* amd_imc.c */
|
||||
int amd_imc_shutdown(struct pci_dev *dev);
|
||||
|
||||
/* it85spi.c */
|
||||
int it85xx_spi_init(struct superio s);
|
||||
|
||||
/* it87spi.c */
|
||||
void enter_conf_mode_ite(uint16_t port);
|
||||
void exit_conf_mode_ite(uint16_t port);
|
||||
void probe_superio_ite(void);
|
||||
int init_superio_ite(void);
|
||||
|
||||
#if CONFIG_LINUX_MTD == 1
|
||||
/* trivial wrapper to avoid cluttering internal_init() with #if */
|
||||
static inline int try_mtd(void) { return programmer_linux_mtd.init(); };
|
||||
#else
|
||||
static inline int try_mtd(void) { return 1; };
|
||||
#endif
|
||||
|
||||
/* mcp6x_spi.c */
|
||||
int mcp6x_spi_init(int want_spi);
|
||||
|
||||
|
||||
|
||||
/* sb600spi.c */
|
||||
int sb600_probe_spi(struct pci_dev *dev);
|
||||
|
||||
/* wbsio_spi.c */
|
||||
int wbsio_check_for_spi(void);
|
||||
#endif
|
||||
|
||||
/* opaque.c */
|
||||
struct opaque_master {
|
||||
int max_data_read;
|
||||
int max_data_write;
|
||||
/* Specific functions for this master */
|
||||
int (*probe) (struct flashctx *flash);
|
||||
int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
|
||||
int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
|
||||
enum flashrom_wp_result (*wp_write_cfg)(struct flashctx *, const struct flashrom_wp_cfg *);
|
||||
enum flashrom_wp_result (*wp_read_cfg)(struct flashrom_wp_cfg *, struct flashctx *);
|
||||
enum flashrom_wp_result (*wp_get_ranges)(struct flashrom_wp_ranges **, struct flashctx *);
|
||||
int (*shutdown)(void *data);
|
||||
void *data;
|
||||
};
|
||||
int register_opaque_master(const struct opaque_master *mst, void *data);
|
||||
|
||||
/* programmer.c */
|
||||
void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
|
||||
void fallback_unmap(void *virt_addr, size_t len);
|
||||
void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
|
||||
void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
|
||||
void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
|
||||
uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
|
||||
uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
|
||||
void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
|
||||
struct par_master {
|
||||
void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
|
||||
void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
|
||||
void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
|
||||
void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
|
||||
uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
|
||||
uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
|
||||
uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
|
||||
void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
|
||||
int (*shutdown)(void *data);
|
||||
void *data;
|
||||
};
|
||||
int register_par_master(const struct par_master *mst, const enum chipbustype buses, void *data);
|
||||
struct registered_master {
|
||||
enum chipbustype buses_supported;
|
||||
struct {
|
||||
struct par_master par;
|
||||
struct spi_master spi;
|
||||
struct opaque_master opaque;
|
||||
};
|
||||
};
|
||||
extern struct registered_master registered_masters[];
|
||||
extern int registered_master_count;
|
||||
int register_master(const struct registered_master *mst);
|
||||
|
||||
|
||||
|
||||
/* serial.c */
|
||||
#if IS_WINDOWS
|
||||
typedef HANDLE fdtype;
|
||||
#define SER_INV_FD INVALID_HANDLE_VALUE
|
||||
#else
|
||||
typedef int fdtype;
|
||||
#define SER_INV_FD -1
|
||||
#endif
|
||||
|
||||
void sp_flush_incoming(void);
|
||||
fdtype sp_openserport(char *dev, int baud);
|
||||
extern fdtype sp_fd;
|
||||
int serialport_config(fdtype fd, int baud);
|
||||
int serialport_shutdown(void *data);
|
||||
int serialport_write(const unsigned char *buf, unsigned int writecnt);
|
||||
int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
|
||||
int serialport_read(unsigned char *buf, unsigned int readcnt);
|
||||
int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
|
||||
|
||||
/* Serial port/pin mapping:
|
||||
|
||||
1 CD <-
|
||||
2 RXD <-
|
||||
3 TXD ->
|
||||
4 DTR ->
|
||||
5 GND --
|
||||
6 DSR <-
|
||||
7 RTS ->
|
||||
8 CTS <-
|
||||
9 RI <-
|
||||
*/
|
||||
enum SP_PIN {
|
||||
PIN_CD = 1,
|
||||
PIN_RXD,
|
||||
PIN_TXD,
|
||||
PIN_DTR,
|
||||
PIN_GND,
|
||||
PIN_DSR,
|
||||
PIN_RTS,
|
||||
PIN_CTS,
|
||||
PIN_RI,
|
||||
};
|
||||
|
||||
void sp_set_pin(enum SP_PIN pin, int val);
|
||||
int sp_get_pin(enum SP_PIN pin);
|
||||
|
||||
/* spi_master feature checks */
|
||||
static inline bool spi_master_4ba(const struct flashctx *const flash)
|
||||
{
|
||||
return flash->mst->buses_supported & BUS_SPI &&
|
||||
flash->mst->spi.features & SPI_MASTER_4BA;
|
||||
}
|
||||
static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash)
|
||||
{
|
||||
return flash->mst->buses_supported & BUS_SPI &&
|
||||
flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES;
|
||||
}
|
||||
|
||||
/* usbdev.c */
|
||||
struct libusb_device_handle;
|
||||
struct libusb_context;
|
||||
struct libusb_device_handle *usb_dev_get_by_vid_pid_serial(
|
||||
struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, const char *serialno);
|
||||
struct libusb_device_handle *usb_dev_get_by_vid_pid_number(
|
||||
struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, unsigned int num);
|
||||
|
||||
|
||||
#endif /* !__PROGRAMMER_H__ */
|
||||
224
include/spi.h
Normal file
224
include/spi.h
Normal file
@ -0,0 +1,224 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __SPI_H__
|
||||
#define __SPI_H__ 1
|
||||
|
||||
/*
|
||||
* Contains the generic SPI headers
|
||||
*/
|
||||
|
||||
#define JEDEC_MAX_ADDR_LEN 0x04
|
||||
|
||||
/* Read Electronic ID */
|
||||
#define JEDEC_RDID 0x9f
|
||||
#define JEDEC_RDID_OUTSIZE 0x01
|
||||
/* INSIZE may be 0x04 for some chips*/
|
||||
#define JEDEC_RDID_INSIZE 0x03
|
||||
|
||||
/* Some ST M95X model */
|
||||
#define ST_M95_RDID 0x83
|
||||
#define ST_M95_RDID_3BA_OUTSIZE 0x04 /* 8b op, 24bit addr where size >64KiB */
|
||||
#define ST_M95_RDID_2BA_OUTSIZE 0x03 /* 8b op, 16bit addr where size <=64KiB */
|
||||
#define ST_M95_RDID_OUTSIZE_MAX 0x04 /* ST_M95_RDID_3BA_OUTSIZE */
|
||||
#define ST_M95_RDID_INSIZE 0x03
|
||||
|
||||
/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */
|
||||
#define AT25F_RDID 0x15 /* 0x15 or 0x1d */
|
||||
#define AT25F_RDID_OUTSIZE 0x01
|
||||
#define AT25F_RDID_INSIZE 0x02
|
||||
|
||||
/* Read Electronic Manufacturer Signature */
|
||||
#define JEDEC_REMS 0x90
|
||||
#define JEDEC_REMS_OUTSIZE 0x04
|
||||
#define JEDEC_REMS_INSIZE 0x02
|
||||
|
||||
/* Read Serial Flash Discoverable Parameters (SFDP) */
|
||||
#define JEDEC_SFDP 0x5a
|
||||
#define JEDEC_SFDP_OUTSIZE 0x05 /* 8b op, 24b addr, 8b dummy */
|
||||
/* JEDEC_SFDP_INSIZE : any length */
|
||||
|
||||
/* Read Electronic Signature */
|
||||
#define JEDEC_RES 0xab
|
||||
#define JEDEC_RES_OUTSIZE 0x04
|
||||
/* INSIZE may be 0x02 for some chips*/
|
||||
#define JEDEC_RES_INSIZE 0x01
|
||||
|
||||
/* Write Enable */
|
||||
#define JEDEC_WREN 0x06
|
||||
#define JEDEC_WREN_OUTSIZE 0x01
|
||||
#define JEDEC_WREN_INSIZE 0x00
|
||||
|
||||
/* Write Disable */
|
||||
#define JEDEC_WRDI 0x04
|
||||
#define JEDEC_WRDI_OUTSIZE 0x01
|
||||
#define JEDEC_WRDI_INSIZE 0x00
|
||||
|
||||
/* Chip Erase 0x60 is supported by Macronix/SST chips. */
|
||||
#define JEDEC_CE_60 0x60
|
||||
#define JEDEC_CE_60_OUTSIZE 0x01
|
||||
#define JEDEC_CE_60_INSIZE 0x00
|
||||
|
||||
/* Chip Erase 0x62 is supported by Atmel AT25F chips. */
|
||||
#define JEDEC_CE_62 0x62
|
||||
#define JEDEC_CE_62_OUTSIZE 0x01
|
||||
#define JEDEC_CE_62_INSIZE 0x00
|
||||
|
||||
/* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */
|
||||
#define JEDEC_CE_C7 0xc7
|
||||
#define JEDEC_CE_C7_OUTSIZE 0x01
|
||||
#define JEDEC_CE_C7_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0x50 is supported by Atmel AT26DF chips. */
|
||||
#define JEDEC_BE_50 0x50
|
||||
#define JEDEC_BE_50_OUTSIZE 0x04
|
||||
#define JEDEC_BE_50_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0x52 is supported by SST and old Atmel chips. */
|
||||
#define JEDEC_BE_52 0x52
|
||||
#define JEDEC_BE_52_OUTSIZE 0x04
|
||||
#define JEDEC_BE_52_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0x81 is supported by Atmel AT26DF chips. */
|
||||
#define JEDEC_BE_81 0x81
|
||||
#define JEDEC_BE_81_OUTSIZE 0x04
|
||||
#define JEDEC_BE_81_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xc4 is supported by Micron chips. */
|
||||
#define JEDEC_BE_C4 0xc4
|
||||
#define JEDEC_BE_C4_OUTSIZE 0x04
|
||||
#define JEDEC_BE_C4_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xd8 is supported by EON/Macronix chips. */
|
||||
#define JEDEC_BE_D8 0xd8
|
||||
#define JEDEC_BE_D8_OUTSIZE 0x04
|
||||
#define JEDEC_BE_D8_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xd7 is supported by PMC chips. */
|
||||
#define JEDEC_BE_D7 0xd7
|
||||
#define JEDEC_BE_D7_OUTSIZE 0x04
|
||||
#define JEDEC_BE_D7_INSIZE 0x00
|
||||
|
||||
/* Block Erase 0xdc is supported by Spansion chips, takes 4 byte address */
|
||||
#define JEDEC_BE_DC 0xdc
|
||||
#define JEDEC_BE_DC_OUTSIZE 0x05
|
||||
#define JEDEC_BE_DC_INSIZE 0x00
|
||||
|
||||
/* Sector Erase 0x20 is supported by Macronix/SST chips. */
|
||||
#define JEDEC_SE 0x20
|
||||
#define JEDEC_SE_OUTSIZE 0x04
|
||||
#define JEDEC_SE_INSIZE 0x00
|
||||
|
||||
/* Page Erase 0xDB */
|
||||
#define JEDEC_PE 0xDB
|
||||
#define JEDEC_PE_OUTSIZE 0x04
|
||||
#define JEDEC_PE_INSIZE 0x00
|
||||
|
||||
/* Read Status Register */
|
||||
#define JEDEC_RDSR 0x05
|
||||
#define JEDEC_RDSR_OUTSIZE 0x01
|
||||
#define JEDEC_RDSR_INSIZE 0x01
|
||||
|
||||
/* Read Status Register 2 */
|
||||
#define JEDEC_RDSR2 0x35
|
||||
#define JEDEC_RDSR2_OUTSIZE 0x01
|
||||
#define JEDEC_RDSR2_INSIZE 0x01
|
||||
|
||||
/* Read Status Register 3 */
|
||||
#define JEDEC_RDSR3 0x15
|
||||
#define JEDEC_RDSR3_OUTSIZE 0x01
|
||||
#define JEDEC_RDSR3_INSIZE 0x01
|
||||
|
||||
/* Status Register Bits */
|
||||
#define SPI_SR_WIP (0x01 << 0)
|
||||
#define SPI_SR_WEL (0x01 << 1)
|
||||
#define SPI_SR_ERA_ERR (0x01 << 5)
|
||||
#define SPI_SR_AAI (0x01 << 6)
|
||||
|
||||
/* Write Status Enable */
|
||||
#define JEDEC_EWSR 0x50
|
||||
#define JEDEC_EWSR_OUTSIZE 0x01
|
||||
#define JEDEC_EWSR_INSIZE 0x00
|
||||
|
||||
/* Write Status Register */
|
||||
#define JEDEC_WRSR 0x01
|
||||
#define JEDEC_WRSR_OUTSIZE 0x02
|
||||
#define JEDEC_WRSR_INSIZE 0x00
|
||||
#define JEDEC_WRSR_EXT_OUTSIZE 0x03
|
||||
|
||||
/* Write Status Register 2 */
|
||||
#define JEDEC_WRSR2 0x31
|
||||
#define JEDEC_WRSR2_OUTSIZE 0x02
|
||||
#define JEDEC_WRSR2_INSIZE 0x00
|
||||
|
||||
/* Write Status Register 3 */
|
||||
#define JEDEC_WRSR3 0x11
|
||||
#define JEDEC_WRSR3_OUTSIZE 0x02
|
||||
#define JEDEC_WRSR3_INSIZE 0x00
|
||||
|
||||
/* Enter 4-byte Address Mode */
|
||||
#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7
|
||||
|
||||
/* Exit 4-byte Address Mode */
|
||||
#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9
|
||||
|
||||
/* Write Extended Address Register */
|
||||
#define JEDEC_WRITE_EXT_ADDR_REG 0xC5
|
||||
|
||||
/* Read Extended Address Register */
|
||||
#define JEDEC_READ_EXT_ADDR_REG 0xC8
|
||||
|
||||
/* Read the memory */
|
||||
#define JEDEC_READ 0x03
|
||||
#define JEDEC_READ_OUTSIZE 0x04
|
||||
/* JEDEC_READ_INSIZE : any length */
|
||||
|
||||
/* Read the memory (with delay after sending address) */
|
||||
#define JEDEC_READ_FAST 0x0b
|
||||
|
||||
/* Write memory byte */
|
||||
#define JEDEC_BYTE_PROGRAM 0x02
|
||||
#define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05
|
||||
#define JEDEC_BYTE_PROGRAM_INSIZE 0x00
|
||||
|
||||
/* Write AAI word (SST25VF080B) */
|
||||
#define JEDEC_AAI_WORD_PROGRAM 0xad
|
||||
#define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06
|
||||
#define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03
|
||||
#define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00
|
||||
|
||||
/* Read the memory with 4-byte address
|
||||
From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
|
||||
#define JEDEC_READ_4BA 0x13
|
||||
|
||||
/* Read the memory with 4-byte address (and delay after sending address)
|
||||
From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
|
||||
#define JEDEC_READ_4BA_FAST 0x0c
|
||||
|
||||
/* Write memory byte with 4-byte address
|
||||
From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
|
||||
#define JEDEC_BYTE_PROGRAM_4BA 0x12
|
||||
|
||||
/* Error codes */
|
||||
#define SPI_GENERIC_ERROR -1
|
||||
#define SPI_INVALID_OPCODE -2
|
||||
#define SPI_INVALID_ADDRESS -3
|
||||
#define SPI_INVALID_LENGTH -4
|
||||
#define SPI_FLASHROM_BUG -5
|
||||
#define SPI_PROGRAMMER_ERROR -6
|
||||
|
||||
void clear_spi_id_cache(void);
|
||||
|
||||
#endif /* !__SPI_H__ */
|
||||
181
include/usb_device.h
Normal file
181
include/usb_device.h
Normal file
@ -0,0 +1,181 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2020, Google Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef USB_DEVICE_H
|
||||
#define USB_DEVICE_H
|
||||
|
||||
/*
|
||||
* USB device matching framework
|
||||
*
|
||||
* This can be used to match a USB device by a number of different parameters.
|
||||
* The parameters can be passed on the command line and defaults can be set
|
||||
* by the programmer.
|
||||
*/
|
||||
|
||||
#include <libusb.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/*
|
||||
* The LIBUSB_ERROR macro converts a libusb failure code into an error code that
|
||||
* flashrom recognizes. It does so without displaying an error code allowing us
|
||||
* to compare error codes against the library enumeration values.
|
||||
*/
|
||||
#define LIBUSB_ERROR(error_code) (0x20000 | -(error_code))
|
||||
|
||||
/*
|
||||
* The LIBUSB macro converts a libusb failure code into an error code that
|
||||
* flashrom recognizes. It also displays additional libusb specific
|
||||
* information about the failure.
|
||||
*/
|
||||
#define LIBUSB(expression) \
|
||||
({ \
|
||||
int libusb_error__ = (expression); \
|
||||
\
|
||||
if (libusb_error__ < 0) { \
|
||||
msg_perr("libusb error: %s:%d %s\n", \
|
||||
__FILE__, \
|
||||
__LINE__, \
|
||||
libusb_error_name(libusb_error__)); \
|
||||
libusb_error__ = LIBUSB_ERROR(libusb_error__); \
|
||||
} else { \
|
||||
libusb_error__ = 0; \
|
||||
} \
|
||||
\
|
||||
libusb_error__; \
|
||||
})
|
||||
|
||||
/*
|
||||
* Returns true if the error code falls within the range of valid libusb
|
||||
* error codes.
|
||||
*/
|
||||
static inline bool usb_device_is_libusb_error(int error_code)
|
||||
{
|
||||
return (0x20000 <= error_code && error_code < 0x20064);
|
||||
}
|
||||
|
||||
/*
|
||||
* A USB match and associated value struct are used to encode the information
|
||||
* about a device against which we wish to match. If the value of a
|
||||
* usb_match_value has been set then a device must match that value. The name
|
||||
* of the usb_match_value is used to fetch the programmer parameter from the
|
||||
* flashrom command line and is the same as the name of the corresponding
|
||||
* field in usb_match.
|
||||
*/
|
||||
struct usb_match_value {
|
||||
char const *name;
|
||||
int value;
|
||||
int set;
|
||||
};
|
||||
|
||||
struct usb_match {
|
||||
struct usb_match_value bus;
|
||||
struct usb_match_value address;
|
||||
struct usb_match_value vid;
|
||||
struct usb_match_value pid;
|
||||
struct usb_match_value serial;
|
||||
struct usb_match_value config;
|
||||
struct usb_match_value interface;
|
||||
struct usb_match_value altsetting;
|
||||
struct usb_match_value class;
|
||||
struct usb_match_value subclass;
|
||||
struct usb_match_value protocol;
|
||||
};
|
||||
|
||||
/*
|
||||
* Initialize a usb_match structure so that each value's name matches the
|
||||
* values name in the usb_match structure (so bus.name == "bus"...), and
|
||||
* look for each value in the flashrom command line via
|
||||
* extract_programmer_param. If the value is found convert it to an integer
|
||||
* using strtol, accepting hex, decimal and octal encoding.
|
||||
*/
|
||||
void usb_match_init(struct usb_match *match);
|
||||
|
||||
/*
|
||||
* Add a default value to a usb_match_value. This must be done after calling
|
||||
* usb_match_init. If usb_match_init already set the value of a usb_match_value
|
||||
* we do nothing, otherwise set the value to default_value. This ensures that
|
||||
* parameters passed on the command line override defaults.
|
||||
*/
|
||||
void usb_match_value_default(struct usb_match_value *match,
|
||||
long int default_value);
|
||||
|
||||
/*
|
||||
* The usb_device structure is an entry in a linked list of devices that were
|
||||
* matched by usb_device_find.
|
||||
*/
|
||||
struct usb_device {
|
||||
struct libusb_device *device;
|
||||
struct libusb_config_descriptor *config_descriptor;
|
||||
struct libusb_interface_descriptor const *interface_descriptor;
|
||||
|
||||
/*
|
||||
* Initially NULL, the libusb_device_handle is only valid once the
|
||||
* usb_device has been successfully passed to usb_device_show or
|
||||
* usb_device_claim.
|
||||
*/
|
||||
struct libusb_device_handle *handle;
|
||||
|
||||
/*
|
||||
* Link to next device, or NULL
|
||||
*/
|
||||
struct usb_device *next;
|
||||
};
|
||||
|
||||
/*
|
||||
* Find and return a list of all compatible devices. Each device is added to
|
||||
* the list with its first valid configuration and interface. If an alternate
|
||||
* configuration (config, interface, altsetting...) is desired the specifics
|
||||
* can be supplied as programmer parameters.
|
||||
*
|
||||
* Return:
|
||||
* 0: At least one matching device was found.
|
||||
* 1: No matching devices were found.
|
||||
*/
|
||||
int usb_device_find(struct usb_match const *match, struct usb_device **devices);
|
||||
|
||||
/*
|
||||
* Display the devices bus and address as well as its product string. The
|
||||
* underlying libusb device is opened if it is not already open.
|
||||
*
|
||||
* Return:
|
||||
* 0: The device information was displayed.
|
||||
* non-zero: There was a failure while displaying the device information.
|
||||
*/
|
||||
int usb_device_show(char const *prefix, struct usb_device *device);
|
||||
|
||||
/*
|
||||
* Open the underlying libusb device, set its config, claim the interface and
|
||||
* select the correct alternate interface.
|
||||
*
|
||||
* Return:
|
||||
* 0: The device was successfully claimed.
|
||||
* non-zero: There was a failure while trying to claim the device.
|
||||
*/
|
||||
int usb_device_claim(struct usb_device *device);
|
||||
|
||||
/*
|
||||
* Free a usb_device structure.
|
||||
*
|
||||
* This ensures that the libusb device is closed and that all allocated
|
||||
* handles and descriptors are freed.
|
||||
*
|
||||
* Return:
|
||||
* The next device in the device list.
|
||||
*/
|
||||
struct usb_device *usb_device_free(struct usb_device *device);
|
||||
|
||||
#endif /* USB_DEVICE_H */
|
||||
89
include/writeprotect.h
Normal file
89
include/writeprotect.h
Normal file
@ -0,0 +1,89 @@
|
||||
/*
|
||||
* This file is part of the flashrom project.
|
||||
*
|
||||
* Copyright (C) 2010 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __WRITEPROTECT_H__
|
||||
#define __WRITEPROTECT_H__ 1
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
|
||||
#include "libflashrom.h"
|
||||
|
||||
#define MAX_BP_BITS 4
|
||||
|
||||
/* Chip protection range: start address and length. */
|
||||
struct wp_range {
|
||||
size_t start, len;
|
||||
};
|
||||
|
||||
/* Generic description of a chip's write protection configuration. */
|
||||
struct flashrom_wp_cfg {
|
||||
enum flashrom_wp_mode mode;
|
||||
struct wp_range range;
|
||||
};
|
||||
|
||||
/* Collection of multiple write protection ranges. */
|
||||
struct flashrom_wp_ranges {
|
||||
struct wp_range *ranges;
|
||||
size_t count;
|
||||
};
|
||||
|
||||
/*
|
||||
* Description of a chip's write protection configuration.
|
||||
*
|
||||
* It allows most WP code to store and manipulate a chip's configuration
|
||||
* without knowing the exact layout of bits in the chip's status registers.
|
||||
*/
|
||||
struct wp_bits {
|
||||
/* Status register protection bit (SRP) */
|
||||
bool srp_bit_present;
|
||||
uint8_t srp;
|
||||
|
||||
/* Status register lock bit (SRL) */
|
||||
bool srl_bit_present;
|
||||
uint8_t srl;
|
||||
|
||||
/* Complement bit (CMP) */
|
||||
bool cmp_bit_present;
|
||||
uint8_t cmp;
|
||||
|
||||
/* Sector/block protection bit (SEC) */
|
||||
bool sec_bit_present;
|
||||
uint8_t sec;
|
||||
|
||||
/* Top/bottom protection bit (TB) */
|
||||
bool tb_bit_present;
|
||||
uint8_t tb;
|
||||
|
||||
/* Block protection bits (BP) */
|
||||
size_t bp_bit_count;
|
||||
uint8_t bp[MAX_BP_BITS];
|
||||
};
|
||||
|
||||
struct flashrom_flashctx;
|
||||
|
||||
/* Write WP configuration to the chip */
|
||||
enum flashrom_wp_result wp_write_cfg(struct flashrom_flashctx *, const struct flashrom_wp_cfg *);
|
||||
|
||||
/* Read WP configuration from the chip */
|
||||
enum flashrom_wp_result wp_read_cfg(struct flashrom_wp_cfg *, struct flashrom_flashctx *);
|
||||
|
||||
/* Get a list of protection ranges supported by the chip */
|
||||
enum flashrom_wp_result wp_get_available_ranges(struct flashrom_wp_ranges **, struct flashrom_flashctx *);
|
||||
|
||||
#endif /* !__WRITEPROTECT_H__ */
|
||||
Reference in New Issue
Block a user