1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

Remove delays in JEDEC erase sequence

It is extremely unlikely that a chip not requiring delays in probe does
require them in erase. We observed unreliable erasing with a SST49LF004A
with these delays, so remove them if the are not required.

In review, I got the hint that "probe_jedec goes further by making that
call conditional on nonzero delay". I decided to ignore that. For
internal_delay, the small amount of clock cycles wasted for calling
programmer_delay(0) is negligible compared to LPC cycle times. It might
be an issue for 5 wasted bytes on the serial line in serprog. OTOH,
flash erase is still slow compared to 6*5 bytes on a serial port at
reasonable speed.

Corresponding to flashrom svn r1288.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
Michael Karcher 2011-04-15 00:03:37 +00:00
parent 4b17736985
commit 880e867ae8

45
jedec.c
View File

@ -242,21 +242,24 @@ static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page,
unsigned int pagesize, unsigned int mask)
{
chipaddr bios = flash->virtual_memory;
int delay_us = 0;
if(flash->probe_timing != TIMING_ZERO)
delay_us = 10;
/* Issue the Sector Erase command */
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x80, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x30, bios + page);
programmer_delay(10);
programmer_delay(delay_us);
/* wait for Toggle bit ready */
toggle_ready_jedec_slow(bios);
@ -272,21 +275,24 @@ static int erase_block_jedec_common(struct flashchip *flash, unsigned int block,
unsigned int blocksize, unsigned int mask)
{
chipaddr bios = flash->virtual_memory;
int delay_us = 0;
if(flash->probe_timing != TIMING_ZERO)
delay_us = 10;
/* Issue the Sector Erase command */
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x80, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x50, bios + block);
programmer_delay(10);
programmer_delay(delay_us);
/* wait for Toggle bit ready */
toggle_ready_jedec_slow(bios);
@ -302,21 +308,24 @@ static int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask)
{
int total_size = flash->total_size * 1024;
chipaddr bios = flash->virtual_memory;
int delay_us = 0;
if(flash->probe_timing != TIMING_ZERO)
delay_us = 10;
/* Issue the JEDEC Chip Erase command */
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x80, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0xAA, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x55, bios + (0x2AAA & mask));
programmer_delay(10);
programmer_delay(delay_us);
chip_writeb(0x10, bios + (0x5555 & mask));
programmer_delay(10);
programmer_delay(delay_us);
toggle_ready_jedec_slow(bios);