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Code Issues Releases Wiki Activity

Fix message printing for SPI RES on spew level

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Use a blacklist instead of a whitelist for 4-byte SPI RDID.
Tell users where to report bugs.

Corresponding to flashrom svn r1051.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This commit is contained in:
Carl-Daniel Hailfinger
2010-06-20 10:39:33 +00:00
parent 80a59ea2d5
commit 8ae500e09d
2 changed files with 26 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
spi.c
View File

@ -132,7 +132,8 @@ int spi_send_command(unsigned int writecnt, unsigned int readcnt,
{ {
if (!spi_programmer[spi_controller].command) { if (!spi_programmer[spi_controller].command) {
msg_perr("%s called, but SPI is unsupported on this " msg_perr("%s called, but SPI is unsupported on this "
"hardware. Please report a bug.\n", __func__); "hardware. Please report a bug at "
"flashrom@flashrom.org\n", __func__);
return 1; return 1;
} }
@ -144,7 +145,8 @@ int spi_send_multicommand(struct spi_command *cmds)
{ {
if (!spi_programmer[spi_controller].multicommand) { if (!spi_programmer[spi_controller].multicommand) {
msg_perr("%s called, but SPI is unsupported on this " msg_perr("%s called, but SPI is unsupported on this "
"hardware. Please report a bug.\n", __func__); "hardware. Please report a bug at "
"flashrom@flashrom.org\n", __func__);
return 1; return 1;
} }
@ -184,7 +186,8 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
{ {
if (!spi_programmer[spi_controller].read) { if (!spi_programmer[spi_controller].read) {
msg_perr("%s called, but SPI read is unsupported on this " msg_perr("%s called, but SPI read is unsupported on this "
" hardware. Please report a bug.\n", __func__); "hardware. Please report a bug at "
"flashrom@flashrom.org\n", __func__);
return 1; return 1;
} }
@ -198,8 +201,9 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
int spi_chip_write_256(struct flashchip *flash, uint8_t *buf) int spi_chip_write_256(struct flashchip *flash, uint8_t *buf)
{ {
if (!spi_programmer[spi_controller].write_256) { if (!spi_programmer[spi_controller].write_256) {
msg_perr("%s called, but SPI page write is unsupported " msg_perr("%s called, but SPI page write is unsupported on this "
" on this hardware. Please report a bug.\n", __func__); "hardware. Please report a bug at "
"flashrom@flashrom.org\n", __func__);
return 1; return 1;
} }

38
spi25.c
View File

@ -72,6 +72,7 @@ static int spi_res(unsigned char *readarr, int bytes)
unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 };
uint32_t readaddr; uint32_t readaddr;
int ret; int ret;
int i;
ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
if (ret == SPI_INVALID_ADDRESS) { if (ret == SPI_INVALID_ADDRESS) {
@ -84,7 +85,10 @@ static int spi_res(unsigned char *readarr, int bytes)
} }
if (ret) if (ret)
return ret; return ret;
msg_cspew("RES returned %02x. ", readarr[0]); msg_cspew("RES returned");
for (i = 0; i < bytes; i++)
msg_cspew(" 0x%02x", readarr[i]);
msg_cspew(". ");
return 0; return 0;
} }
@ -122,7 +126,9 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
if (!oddparity(readarr[0])) if (!oddparity(readarr[0]))
msg_cdbg("RDID byte 0 parity violation. "); msg_cdbg("RDID byte 0 parity violation. ");
/* Check if this is a continuation vendor ID */ /* Check if this is a continuation vendor ID.
* FIXME: Handle continuation device IDs.
*/
if (readarr[0] == 0x7f) { if (readarr[0] == 0x7f) {
if (!oddparity(readarr[1])) if (!oddparity(readarr[1]))
msg_cdbg("RDID byte 1 parity violation. "); msg_cdbg("RDID byte 1 parity violation. ");
@ -166,35 +172,23 @@ int probe_spi_rdid(struct flashchip *flash)
return probe_spi_rdid_generic(flash, 3); return probe_spi_rdid_generic(flash, 3);
} }
/* support 4 bytes flash ID */
int probe_spi_rdid4(struct flashchip *flash) int probe_spi_rdid4(struct flashchip *flash)
{ {
/* only some SPI chipsets support 4 bytes commands */ /* Some SPI controllers do not support commands with writecnt=1 and
* readcnt=4.
*/
switch (spi_controller) { switch (spi_controller) {
#if CONFIG_INTERNAL == 1 #if CONFIG_INTERNAL == 1
#if defined(__i386__) || defined(__x86_64__) #if defined(__i386__) || defined(__x86_64__)
case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_IT87XX:
case SPI_CONTROLLER_ICH9:
case SPI_CONTROLLER_VIA:
case SPI_CONTROLLER_SB600:
case SPI_CONTROLLER_WBSIO: case SPI_CONTROLLER_WBSIO:
msg_cinfo("4 byte RDID not supported on this SPI controller\n");
return 0;
break;
#endif #endif
#endif #endif
#if CONFIG_FT2232_SPI == 1
case SPI_CONTROLLER_FT2232:
#endif
#if CONFIG_DUMMY == 1
case SPI_CONTROLLER_DUMMY:
#endif
#if CONFIG_BUSPIRATE_SPI == 1
case SPI_CONTROLLER_BUSPIRATE:
#endif
#if CONFIG_DEDIPROG == 1
case SPI_CONTROLLER_DEDIPROG:
#endif
return probe_spi_rdid_generic(flash, 4);
default: default:
msg_cinfo("4b ID not supported on this SPI controller\n"); return probe_spi_rdid_generic(flash, 4);
} }
return 0; return 0;