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rayer_spi: Improve support for different pinouts
Create a list of programmer types with names, test state and linked layouts. This list could be listed with flashrom -L in follow-up patches. Handle a bit in status register that is inverted, this will be used in different future programmer types. Corresponding to flashrom svn r1753. Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: Maksim Kuleshov <mmcx@mail.ru> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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@ -208,8 +208,7 @@ atmegaXXu2-flasher by Stefan Tauner."
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.sp
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.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
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.sp
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.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport "
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or Xilinx DLC5 compatible cable)
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.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
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.sp
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.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
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bitbanging adapter)
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@ -766,9 +765,9 @@ can be
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More information about the RayeR hardware is available at
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.nh
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.BR "http://rayer.ic.cz/elektro/spipgm.htm " .
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The schematic of the Xilinx DLC 5 was published at
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The schematic of the Xilinx DLC 5 was published in
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.nh
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.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
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.BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " .
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.SS
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.BR "pony_spi " programmer
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The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
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114
rayer_spi.c
114
rayer_spi.c
@ -17,11 +17,9 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Driver for the SPIPGM hardware by "RayeR" Martin Rehak.
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* See http://rayer.ic.cz/elektro/spipgm.htm for schematics and instructions.
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*/
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/* This driver uses non-portable direct I/O port accesses which won't work on
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/* Driver for various LPT adapters.
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*
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* This driver uses non-portable direct I/O port accesses which won't work on
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* any non-x86 platform, and even on x86 there is a high chance there will be
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* collisions with any loaded parallel port drivers.
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* The big advantage of direct port I/O is OS independence and speed because
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@ -37,21 +35,48 @@
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#include "programmer.h"
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#include "hwaccess.h"
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enum rayer_type {
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TYPE_RAYER,
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TYPE_XILINX_DLC5,
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};
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/* We have two sets of pins, out and in. The numbers for both sets are
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* independent and are bitshift values, not real pin numbers.
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* Default settings are for the RayeR hardware.
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*/
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/* Pins for master->slave direction */
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static int rayer_cs_bit = 5;
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static int rayer_sck_bit = 6;
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static int rayer_mosi_bit = 7;
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/* Pins for slave->master direction */
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static int rayer_miso_bit = 6;
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struct rayer_programmer {
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const char *type;
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const enum test_state status;
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const char *description;
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const void *dev_data;
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};
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struct rayer_pinout {
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uint8_t cs_bit;
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uint8_t sck_bit;
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uint8_t mosi_bit;
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uint8_t miso_bit;
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void (*preinit)(const void *);
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int (*shutdown)(void *);
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};
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static const struct rayer_pinout rayer_spipgm = {
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.cs_bit = 5,
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.sck_bit = 6,
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.mosi_bit = 7,
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.miso_bit = 6,
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};
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static const struct rayer_pinout xilinx_dlc5 = {
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.cs_bit = 2,
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.sck_bit = 1,
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.mosi_bit = 0,
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.miso_bit = 4,
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};
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static const struct rayer_programmer rayer_spi_types[] = {
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{"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
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{"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
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{0},
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};
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static const struct rayer_pinout *pinout = NULL;
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static uint16_t lpt_iobase;
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@ -60,22 +85,22 @@ static uint8_t lpt_outbyte;
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static void rayer_bitbang_set_cs(int val)
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{
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lpt_outbyte &= ~(1 << rayer_cs_bit);
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lpt_outbyte |= (val << rayer_cs_bit);
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lpt_outbyte &= ~(1 << pinout->cs_bit);
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lpt_outbyte |= (val << pinout->cs_bit);
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OUTB(lpt_outbyte, lpt_iobase);
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}
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static void rayer_bitbang_set_sck(int val)
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{
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lpt_outbyte &= ~(1 << rayer_sck_bit);
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lpt_outbyte |= (val << rayer_sck_bit);
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lpt_outbyte &= ~(1 << pinout->sck_bit);
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lpt_outbyte |= (val << pinout->sck_bit);
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OUTB(lpt_outbyte, lpt_iobase);
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}
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static void rayer_bitbang_set_mosi(int val)
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{
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lpt_outbyte &= ~(1 << rayer_mosi_bit);
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lpt_outbyte |= (val << rayer_mosi_bit);
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lpt_outbyte &= ~(1 << pinout->mosi_bit);
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lpt_outbyte |= (val << pinout->mosi_bit);
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OUTB(lpt_outbyte, lpt_iobase);
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}
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@ -83,8 +108,8 @@ static int rayer_bitbang_get_miso(void)
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{
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uint8_t tmp;
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tmp = INB(lpt_iobase + 1);
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tmp = (tmp >> rayer_miso_bit) & 0x1;
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tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted
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tmp = (tmp >> pinout->miso_bit) & 0x1;
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return tmp;
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}
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@ -99,8 +124,8 @@ static const struct bitbang_spi_master bitbang_spi_master_rayer = {
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int rayer_spi_init(void)
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{
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const struct rayer_programmer *prog = rayer_spi_types;
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char *arg = NULL;
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enum rayer_type rayer_type = TYPE_RAYER;
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/* Non-default port requested? */
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arg = extract_programmer_param("iobase");
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@ -138,36 +163,20 @@ int rayer_spi_init(void)
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arg = extract_programmer_param("type");
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if (arg) {
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if (!strcasecmp(arg, "rayer")) {
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rayer_type = TYPE_RAYER;
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} else if (!strcasecmp(arg, "xilinx")) {
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rayer_type = TYPE_XILINX_DLC5;
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} else {
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for (; prog->type != NULL; prog++) {
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if (strcasecmp(arg, prog->type) == 0) {
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break;
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}
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}
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if (prog->type == NULL) {
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msg_perr("Error: Invalid device type specified.\n");
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free(arg);
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return 1;
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}
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free(arg);
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}
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free(arg);
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switch (rayer_type) {
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case TYPE_RAYER:
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msg_pdbg("Using RayeR SPIPGM pinout.\n");
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/* Bits for master->slave direction */
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rayer_cs_bit = 5;
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rayer_sck_bit = 6;
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rayer_mosi_bit = 7;
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/* Bits for slave->master direction */
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rayer_miso_bit = 6;
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break;
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case TYPE_XILINX_DLC5:
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msg_pdbg("Using Xilinx Parallel Cable III (DLC 5) pinout.\n");
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/* Bits for master->slave direction */
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rayer_cs_bit = 2;
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rayer_sck_bit = 1;
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rayer_mosi_bit = 0;
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/* Bits for slave->master direction */
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rayer_miso_bit = 4;
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}
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msg_pinfo("Using %s pinout.\n", prog->description);
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pinout = (struct rayer_pinout *)prog->dev_data;
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if (rget_io_perms())
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return 1;
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@ -175,6 +184,11 @@ int rayer_spi_init(void)
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/* Get the initial value before writing to any line. */
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lpt_outbyte = INB(lpt_iobase);
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if (pinout->shutdown)
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register_shutdown(pinout->shutdown, (void*)pinout);
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if (pinout->preinit)
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pinout->preinit(pinout);
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if (bitbang_spi_init(&bitbang_spi_master_rayer))
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return 1;
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