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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer

The project is in the the process of designing and making a complete,
open source, graphics card. More info at http://wiki.opengraphics.org.

The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
own flash and does not need to be programmed by flashrom - it ensures
that the device can enumerate on the PCI bus without needing further
configuration.

The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
smaller (128 KBytes). This patch adds support for programming either of
the two SPI flash chips.

The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).

Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested
for write.

Corresponding to flashrom svn r1241.

Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
Mark Marshall
2010-12-03 14:48:11 +00:00
committed by Carl-Daniel Hailfinger
parent 859f3f0d75
commit 90021f28ff
9 changed files with 281 additions and 3 deletions

View File

@ -198,6 +198,9 @@ based programmer)"
.BR "* nicintel_spi" " (for SPI flash ROMs attached to an Intel Gigabit \
network cards)"
.sp
.BR "* ogp_spi" " (for SPI flash ROMs attached to an Open Graphics Project \
graphics card)"
.sp
Some programmers have optional or mandatory parameters which are described
in detail in the
.B PROGRAMMER SPECIFIC INFO
@ -432,6 +435,34 @@ four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
.sp
More information about the hardware is available at
http://rayer.ic.cz/elektro/spipgm.htm
.TP
.BR "ogp_spi " programmer
The FLASH ROM chip to access must be specified with the
.B rom
parameter.
.sp
.B " flashrom \-p ogp_spi:rom=name"
.sp
Where
.B name
is either
.B cprom
or
.B s3
for the configuration ROM and
.B bprom
or
.B bios
for the BIOS ROM. If more than one card supported by the ogp_spi programmer
is installed in your system, you have to specify the PCI address of the card
you want to use with the
.B pci=
parameter as explained in the
.B nic3com
section above.
.sp
More information about the hardware is available at
http://wiki.opengraphics.org
.SH EXIT STATUS
flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
@ -480,6 +511,9 @@ have to be run as superuser/root, and need additional raw access permission.
can be run as normal user on most operating systems if appropriate device
permissions are set.
.sp
.B ogp
needs PCI configuration space read access and raw memory access.
.sp
On OpenBSD, you can obtain raw access permission by setting
securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single
user mode.
@ -538,6 +572,8 @@ Luc Verhaegen
.br
Li-Ta Lo
.br
Mark Marshall
.br
Markus Boas
.br
Mattias Mattsson