mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-02 14:33:18 +02:00
Random whitespace and coding-style fixes
Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE where possible, wrap overly long line, etc. Compile-tested. There should be no functional changes. Corresponding to flashrom svn r1397. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
8
a25.c
8
a25.c
@ -31,7 +31,7 @@ int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
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msg_cdbg("Chip status register is %02x\n", status);
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msg_cdbg("Chip status register: Status Register Write Disable "
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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spi_prettyprint_status_register_bit(status, 6);
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spi_prettyprint_status_register_bit(status, 5);
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spi_prettyprint_status_register_bit(status, 4);
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@ -48,7 +48,7 @@ int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
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msg_cdbg("Chip status register is %02x\n", status);
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msg_cdbg("Chip status register: Status Register Write Disable "
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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spi_prettyprint_status_register_bit(status, 6);
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spi_prettyprint_status_register_bit(status, 5);
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spi_prettyprint_status_register_bp3210(status, 2);
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@ -64,7 +64,7 @@ int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
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msg_cdbg("Chip status register is %02x\n", status);
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msg_cdbg("Chip status register: Status Register Write Disable "
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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msg_cdbg("Chip status register: Sector Protect Size (SEC) "
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"is %i KB\n", (status & (1 << 6)) ? 4 : 64);
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msg_cdbg("Chip status register: Top/Bottom (TB) "
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@ -83,7 +83,7 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
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msg_cdbg("Chip status register is %02x\n", status);
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msg_cdbg("Chip status register: Status Register Write Disable "
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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"(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
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msg_cdbg("Chip status register: Sector Protect Size (SEC) "
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"is %i KB\n", (status & (1 << 6)) ? 4 : 64);
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msg_cdbg("Chip status register: Top/Bottom (TB) "
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