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sb600spi.c: Generalise determin_generation() after Yangtze

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Drop dead USE_YANGTZE_HEURISTICS code and add Promontory support.

Change-Id: I5aa7370025f5c1af56c6cb96194b6f3007d0ede7
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Edward O'Callaghan 2019-10-29 18:30:01 +11:00 committed by Nico Huber
parent 9355e6faf6
commit 93737bcaf5
1 changed files with 9 additions and 21 deletions
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30
sb600spi.c
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@ -49,6 +49,7 @@ enum amd_chipset {
CHIPSET_HUDSON234, CHIPSET_HUDSON234,
CHIPSET_BOLTON, CHIPSET_BOLTON,
CHIPSET_YANGTZE, CHIPSET_YANGTZE,
CHIPSET_PROMONTORY,
}; };
static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN;
@ -118,22 +119,6 @@ static int determine_generation(struct pci_dev *dev)
} else if (dev->device_id == 0x780e) { } else if (dev->device_id == 0x780e) {
/* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash)
* although they use different SPI interfaces. */ * although they use different SPI interfaces. */
#ifdef USE_YANGTZE_HEURISTICS
/* This heuristic accesses the SPI interface MMIO BAR at locations beyond those supported by
* Hudson in the hope of getting 0xff readback on older chipsets and non-0xff readback on
* Yangtze (and newer, compatible chipsets). */
int i;
msg_pdbg("Checking for AMD Yangtze (Kabini/Temash) or later... ");
for (i = 0x20; i <= 0x4f; i++) {
if (mmio_readb(sb600_spibar + i) != 0xff) {
amd_gen = CHIPSET_YANGTZE;
msg_pdbg("found.\n");
return 0;
}
}
msg_pdbg("not found. Assuming Hudson.\n");
amd_gen = CHIPSET_HUDSON234;
#else
int rev = find_smbus_dev_rev(0x1022, 0x780B); int rev = find_smbus_dev_rev(0x1022, 0x780B);
if (rev < 0) if (rev < 0)
return -1; return -1;
@ -158,6 +143,9 @@ static int determine_generation(struct pci_dev *dev)
if (rev == 0x4a) { if (rev == 0x4a) {
amd_gen = CHIPSET_YANGTZE; amd_gen = CHIPSET_YANGTZE;
msg_pdbg("Yangtze detected.\n"); msg_pdbg("Yangtze detected.\n");
} else if (rev == 0x4b) {
amd_gen = CHIPSET_PROMONTORY;
msg_pdbg("Promontory detected.\n");
} else { } else {
msg_pwarn("FCH device found but SMBus revision 0x%02x does not match known values.\n" msg_pwarn("FCH device found but SMBus revision 0x%02x does not match known values.\n"
"Please report this to flashrom@flashrom.org and include this log and\n" "Please report this to flashrom@flashrom.org and include this log and\n"
@ -165,7 +153,6 @@ static int determine_generation(struct pci_dev *dev)
} }
#endif
} else } else
msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n"
"Please report this to flashrom@flashrom.org and include this log and\n" "Please report this to flashrom@flashrom.org and include this log and\n"
@ -595,7 +582,7 @@ int sb600_probe_spi(struct pci_dev *dev)
msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1);
if (amd_gen == CHIPSET_SB7XX) if (amd_gen == CHIPSET_SB7XX)
msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1);
else if (amd_gen == CHIPSET_YANGTZE) else if (amd_gen >= CHIPSET_YANGTZE)
msg_pdbg(", RouteTpm2Sp=%i", (tmp >> 3) & 0x1); msg_pdbg(", RouteTpm2Sp=%i", (tmp >> 3) & 0x1);
tmp = pci_read_byte(dev, 0xba); tmp = pci_read_byte(dev, 0xba);
@ -631,13 +618,13 @@ int sb600_probe_spi(struct pci_dev *dev)
*/ */
tmp = mmio_readl(sb600_spibar + 0x00); tmp = mmio_readl(sb600_spibar + 0x00);
msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1);
if (amd_gen == CHIPSET_YANGTZE) if (amd_gen >= CHIPSET_YANGTZE)
msg_pdbg(", IllegalAccess=%i", (tmp >> 21) & 0x1); msg_pdbg(", IllegalAccess=%i", (tmp >> 21) & 0x1);
msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i",
(tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7);
if (amd_gen != CHIPSET_YANGTZE) if (amd_gen < CHIPSET_YANGTZE)
msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1);
switch (amd_gen) { switch (amd_gen) {
@ -647,6 +634,7 @@ int sb600_probe_spi(struct pci_dev *dev)
case CHIPSET_SB89XX: case CHIPSET_SB89XX:
case CHIPSET_HUDSON234: case CHIPSET_HUDSON234:
case CHIPSET_YANGTZE: case CHIPSET_YANGTZE:
case CHIPSET_PROMONTORY:
msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1);
default: break; default: break;
} }
@ -710,7 +698,7 @@ int sb600_probe_spi(struct pci_dev *dev)
return ERROR_FATAL; return ERROR_FATAL;
/* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */ /* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */
if (amd_gen != CHIPSET_YANGTZE) if (amd_gen < CHIPSET_YANGTZE)
register_spi_master(&spi_master_sb600); register_spi_master(&spi_master_sb600);
else else
register_spi_master(&spi_master_yangtze); register_spi_master(&spi_master_yangtze);